SU1285611A1 - Device for measuring predominances of discrete signals - Google Patents

Abstract

The invention relates to telecommunications and can be used in monitoring transmission lines. The purpose of the invention is to improve the accuracy while expanding the measurement range. The device contains 1.11 trigger triggers 2 alternating signs, elements OF, B, 9, master oscillator 4, time master counter (TCS) 5, blocking counter 6, driver 7 of the front selection zones, delay element 10, averaging reversible a counter (PC) 12, elements OR 13, 16, a sampling counter 14, a measuring PC 15 and a digital indicator 17. A digital signal with the help of a trigger 1 is converted into a signal with steep edges and with a calibrated amplitude. The selector 2 alternating forms short pulses, respectively. to back fronts of the analyzed sprinkles. Shaper 7 forms zones for selecting fronts, respectively, of shortened and elongated parcels. Impulses acc. the back edges of the shortened parcels from the And 8 element and the extended parcels from the And 9 element arrive at the subtraction and addition inputs of the average PC 12. In the presence of dominances and depending on their link, the overflow signal from one of the outputs of the averaging PC 12 arrives at the corresponding values. measuring PC 15 input. The code from measuring PC 15 is used to shift the origin of the time scale in the ECA 5 and record the prevalence on the digital indicator 17. 1 il. (L to 00 sd about: 1 .iU- JuL ZPUJU

Description

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The invention relates to telecommunications and can be used in instrumentation for automated measurement and control of discrete signal transmission lines.

The purpose of the invention is to improve the accuracy while expanding the measurement range.

The drawing shows a structural electrical circuit of the proposed device.

A device for measuring the predominance of discrete signals contains the first trigger 1, the latch 2 change sign, the first IZ element, specifying the generator 4, the time for the counter, 5 the lock counter 6, the driver 7 of the front selection zones, the second 8 and. the third 9 elements are AND, the delay element 10, the second trigger t1, the averaging reversible counter 12, the first element OR 13, the sample counter 14, the measuring reversible counter 15, the second element OR 16, the digital indicator 17, and the set time of the counter 5 consists of a preliminary divider 18 and a divider 19.

The device works as follows.

A digital signal from the output of the demodulator (not shown) is fed to the first trigger 1, where it is formed with steep edges and with a calibrated amplitude. From the output of the trigger 1, a discrete signal arrives at the selector 2 of the alternating sign, from the output of which short pulses correspond to the trailing edges of the analyzed parcels (for example, positive ones), go to the delay element 10 and to the first inputs of the And 8 and 9 elements.

The pulses from the output of the generator 4 through the first element I 3 arrive at the counting input of the time of the setting counter 5, the second input of the element I 3 receives a discrete signal from the output of the trigger 1, opening it with a positive polarity of the parcels. The signals of the corresponding orders from the outputs of the divider 19 are fed to the inputs of the former 7, which forms zones for the selection of the fronts of the shortened and elongated parcels, respectively. It is advisable to choose the widths of the zones equal to 0.4 T (To - the duration of the elementary parcel), which provides a measurement range of not less than 0.4 To, and to form

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which it is enough to use the signals of the three higher digits of the splitter 19. Simultaneously from one of the outputs, the time of the setting counter 5 (expediently from the output of the first decade) is fed to the input of the lock counter 6, which is set to zero status by the back edge of each parcel from the output of the splitter 2 sign change.

The voltage of the Log. G, corresponding to the selection zone, from the outputs of the imaging unit 7 is fed to the third inputs of the And 8 and 9 elements. The second input of the And 8 and 9 elements receives the Log signal. 1 or Log. About from the output of the trigger 11, which is set to 1 by a signal from the output of the blocking counter 6, opening the elements AND 8 and 9. The trigger 11 is set to the O (Inhibit) position by the front of each parcel from the output of the delay element 10. It is advisable to take the inhibition time equal to (0.5-0.6) T, and it should not depend on the initial state of the time of master meter 5 (with an accuracy of 0.1 TO). This blocking of elements 8 and 9 eliminates the effect of crushing on the results of measuring the prevalence regardless of their sign and size.

The pulses corresponding to the falling edges of the shortened parcels from the output of the element And 8 and the elongated parcels from the output of the element And 9 enter the Subtraction and Addition inputs averaged to this reversing counter 12. If there are prevalences depending on their sign on one of the outputs of the averaging reversible counter 12 appears overflow pulse, which is fed to the input Addition Or to input Subtracting the measuring reversing counter 15, changing in the latter to 1 in the direction of increasing or decreasing the previously recorded code number. In the initial state in the measuring reversible counter 15, the code number is set to 0 ... 0, which the front of the sprinkling from the output of the delay element 10 is rewritten during the time of the counter 5 and is the starting point of the time scale when measuring the sprinkling. If the predominance of the parcels equal to O, then the probability of occurrence of the rear fronts with the selection zones is 0.5, and the overflow pulse at the output 128

dach averaging reversible counter 12 is absent.

If the predominance of the negative negative (shortened premises), the probabilities of the appearance of fronts in the selection zones are not equal to each other, and the overflow pulse arrives at the input of the Addition measuring reversing counter 15, recording the last number 1 as a result. counter 5 is shifted in advance towards 1%. Arrival of overflow pulses at the input The addition of the measuring reversing counter 15 and the shift of the time scale during master counter 5 take place before comparing the shift value with the value of the predominance of discrete signals. If the predominance is positive (elongated dressings), then the overflow pulse is fed to the input Subtraction of the measuring reversing counter 15, writing in the last number 99 C 10011001 in binary binary code). This number is rewritten during time setting counter 5, shifting the origin of the timeline to the settling side by 13%. The time slides are shifted during master setpoint 5 until the moment of comparing the magnitude of the shift (relative to O) with the magnitude of the predominance.

Information from the outputs of the measuring reversible counter 15 is fed to the inputs of a digital indicator 17, which indicates the prevalence rate in percent in the forward running (relative to O) with a negative predominance and in the counting back (relative to 100) with a positive prevalence of feed.

At the same time, the pulses from the outputs of the AND 8 and 9 elements through the OR 13 element arrive at the counting input of sample counter 14, and the pulses from the outputs of the averaging reversing counter 12 through the OR element 16 - zero zero counter input with a conversion factor K.

If, during the analysis of the dressing, the averaging reversible counter -12 did not reach overflow, it is reset to its initial position by an overflow pulse from the output of sample counter 14.

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Claims (1)

The invention The device for measuring the predominance of discrete signals, which contains the first and second triggers, the first second and third elements AND, the first and second elements 1SH, the change sign alternator, the time specifying the counter, the averaging and measuring reversible counters, the sample counter, the digital indicator, the delay element and the master oscillator, the output of which is connected to the first input of the first element And, the second input of which is connected to the output of the first trigger and to the input of the selector alternator, the output of which is connected to in the delay element and to the first inputs of the second and third elements AND, whose outputs are connected to the inputs of the first OR element, whose output is connected to the control input of the averaging reversible counter through the sample counter, whose addition and subtraction inputs are connected to the outputs of the second and third elements, respectively And, the output of the delay element through the second trigger is connected to the second input of the second element And, and the outputs of the first element And the delay element are connected respectively to the counting input and to the input before Record the time of the master counter, the information inputs of which are connected to the corresponding information inputs of the measuring reversible counter and the digital indicator, the sign input of which is connected to the sign output of the measuring reversing counter, the addition and subtraction inputs of which are connected respectively to the first and second outputs of the averaging reversible counter, connected to the inputs of the second OR element, the output of which is connected to the zeroing input of the sample counter, which differs from the fact that To increase accuracy while simultaneously expanding the measurement range, a lock counter and a front selection zone driver are introduced, while the output of the selector alternates through a lock counter connected to the installation input of the second trigger, the output of which is connected to the second input of the third And element, the third input and the third input the second element And connected with the corresponding 512856116 the shaper outputs of the selection zones with the corresponding outputs are the fronts time, the inputs of which and the counting giving counter, the input of the blocking counter are connected