SU879805A1 - Device for measuring predominances of discrete signals - Google Patents

Description

(54) DEVICE FOR MEASURING THE PREVENTION OF DISCRETE SIGNALS

The invention relates to telecommunications and can be used in equipment for automated monitoring of radio communication lines. A device for measuring the predominance of discrete signals is known, comprising a series-connected master oscillator and the first AND element, the second input of which is connected to the output of the first trigger signal and the signal alternating polarity The output of which is connected to the input of the delay element u and to the first inputs of the second and third elements I, the second trigger, a counter, a reversible counter, additional converter to display unit 1.

However, the accuracy of measurement in such a device is small. $ 1

The purpose of the invention is to improve the measurement accuracy.

The goal is achieved by the fact that, in the AL device, measurements of the predominance of discrete signals, containing a series-connected master oscillator and the first a7: cement I, the second input of which is connected to the output of the first trigger on the input of a separate polarity sign, the output of which is connected to the input With the first inputs of the second and third elements, And, the second trigger, the counter, the reversible counter, the code converter and the display unit, an additional counter and the first and second elements OR are entered, while The output of the first element I is connected to the clock input of an additional counter, the recording input of which is connected to the first input of the second trigger and to the output of the delay element; the first, second, third, fourth outputs of the additional-meter counter are connected respectively to the second and third inputs of the second element I and the second the third inputs of the third element And, the third and fourth-INPUTS of which are connected respectively to the second input and output of the second trigger, the output of the second element AND is connected to the subtraction input of the reversible counter The first input of the first element OR, whose output through the counter is connected to the control input of the reversible counter, the addition input of which is connected to the output of the third AND element and to the second input of the first OR element, and the first output of the reversible counter the output of which is connected to the input of zeroing the counter, and with the input of the addition of the code converter, the information outputs of which are connected to the corresponding information inputs of the additional counter and the corresponding data inputs of the indication unit, a landmark whose input is connected to the output kodopreobrazovatel landmark whose subtracting input is connected to a second input of the second OR gate and the second output of the reversible counter. The drawing shows a structural electrical circuit of the device described. A device for measuring the predominance of discrete signals contains the first trigger 1, the selector 2 changes the signal polarity, the delay element 3, the master oscillator 4, the first element 5, the additional counter 6, the second and third elements 7 and 8, the second trigger 9, the reversible counter 10, the first element OR 11, the counter 12, the code converter 13, the display unit 14 and the second element OR 15. The device operates as follows. A digital signal from the output of the demodulator (not shown) is fed to the first trigger 1, where it is formed with steep fronts and with a calibrated amplitude. From the output of the first trigger 1, the signal arrives at the selector 2, the signal changes the polarity of the signal, from the output of which short pulses corresponding to the rear edges of the analyzed parcels (for example, positive) arrive at the delay element 3 and at one of the inputs of the second and third elements I.7 and 8 The pulses from the output of the master oscillator 4 through the first element And 5 arrive at the counting input of the additional counter 6. The second input of the first element And 5 receives the signal from the first trigger I, "opening it with a positive polarity of the parcels . The number of bits m of the additional counter 6 is selected on the basis of the accuracy of the measurement of the prevalence and the conditions for obtaining at the output of the counter a signal with a period of To, To - the duration of the elementary parcel. The voltages from the direct and inverse outputs of the last two digits of the additional counter, E, are received respectively at the inputs of the second and third elements I 7 and 8. Thus, the selection zones with a width of 0.25 T0, respectively, for shortened and elongated parcels are formed. At the first inputs of the second and third elements And 7 and 8, there are sign changes from the selector 2 of the sign of the polarity of the signal. The fourth input of the third element And 8 receives the enabling or inhibiting potential from the output of the second flip-flop 9, which is set to the position “About the falling edge of the parcel from the output of the delay element 3”. The position of the prohibition of the third element And 8 is removed after the second trigger 9 is set to the position 1 The setting 1 is effected by the signal from the output of the last discharge of the additional counter 6 after 0.5 T0 from the moment the first element 5 is opened. element And 8 leads to the fact that the fronts of pulses with a duration up to 0.75 T oi are passed by elements And 7 and 8, which eliminates the effect of crushing and large edge distortions on the measurement of the constant dominance of the signal. The pulses corresponding to the rear edges of the parcels with a duration of, respectively, from (p-0.25) to pTy for the second element I 7 and from pGo to (n-fO, 25, for the third element I 8, where n is the multiplicity of the analyzed package from the outputs elements I7 and 8 are fed to the inputs of the "subtraction and" addition of a reversible counter 10. It is advisable to use a 4-bit counter for which N 16. In the initial state, the number N / 2 is set in the reversing counter 10. The ratio between the number of fronts at the outputs of the second and of the third element, And 7 and 8 is determined by the sign and ve The reason for the constant prevalence of parcels.If the predominance is negative (the parcels are shorter), then the number of fronts will be greater at the output of the second element I 7, and if the prevalence is positive - at the output of the third element And 8. Simultaneously, the pulses from the outputs of the elements And 7 and 8 through the first element OR 11 is fed to the counting input of counter 12, the capacitance K of which is determined by the sampling factor STo in the measurement of prevalence. For $ 0.01 and N 16, the value K (100 -f 150). In the presence of prevalence, the reversible counter 10 will switch either to the position "N or" O. After the overflow counter 10 overflows, depending on the overflow sign, a pulse appears on one of its outputs, which either goes to the "addition or to the input" subtraction input, the code converter 13, which uses a 1-bit reverse counter, changes in last by "1 in the direction of either increasing or decreasing the previously written code number. In the initial connection in the code converter 13, the code number is set to "0.0..0, which corresponds to the absence of dominance of the signal. The code number recorded in the code converter 13 corresponds to the predominance value and is fed to the information inputs of the display unit 14 and the last I bits of the additional counter 6, in which this code number is recorded upon arrival, to its input the record of the front of the parcel from the output of the delay element 3 . As a result, the origin of the time scale in the additional counter 6 is shifted by the million in the direction of "advance:

or “lag behind. The shift will be carried out until the actual prevalence value is compared with the time scale shift value in the additional counter 6 at the beginning of each parcel, which corresponds to the recorded code number in the code converter 13 and the display unit 14. The number of bits (and the capacity of the code converter M is determined by the sampling step S T, the predominance values. Obviously, for 0.01, the value of M 100 and to implement the code converter requires an 8-bit reversible counter.

At the same time, pulses from the outputs of the reversible counter 10 through the second element OR 15 are fed to the zeroing input of the counter 12, dropping the latter into "zero; position. If during the analysis of the K. parcels, the reversible counter 10 did not reach the value "N or" O, then OI is reset to the N / 2 position by an overflow pulse from the output of the counter 12. Such a situation will occur if the actual value differs by no more than half of the discrete step; the STo measurements and the number of pulses from the outputs of the second and third elements I 7 and 8 will be comparable. Otherwise, one of the outputs of the reversible counter 10 appears pulse until the counter 12 overflows.

Using the selection of fronts of shortened and elongated parcels, followed by comparing their intensity and shifting the time scale of the selection zones until the fronts are equal in the selection zones, filtering the splittings and large boundary distortions (for example, at the moments of selective fading) increases the accuracy of measurement and allows automated control over the magnitude of the constant prevalence caused by instrumental instabilities.

Claims (1)

Formula invent A device for measuring the predominance of discrete signals, containing a series-connected master oscillator and the first element I, the second input of which is connected to the output of the first trigger and the selector input of the signal polarity, the output of which is connected to the input of the delay element and the first inputs of the second and third elements. , Second trigger, counter, reversible counter, code converter and display unit, characterized in that, in order to improve measurement accuracy, an additional counter and the first and second elements OR are introduced, while the output of the first element AND is connected to the clock input of the additional counter, whose recording input Connected with the first input of the second trigger and with the output of the delay element, the first, second, third, fourth outputs of the additional counter are connected respectively with the second and third inputs of the second element And and with the second and the third inputs of the third element AND, the third and fourth inputs of which are connected respectively to the second input and output of the second trigger, the output of the second element AND is connected to the subtraction input of the reversible counter and the first input of the first OR element, whose output is connected through the counter to the reverse control input the counter whose input is connected to the output of the third element AND to the second input of the first OR element, and the first output of the reversible counter is connected to the first input of the second OR element, the output of which connected to the zeroing input of the counter, and to the addition input of the code converter, the information outputs of which are connected to the corresponding information inputs of the additional counter and the corresponding information inputs of the display unit, the sign input of which is connected to the analog output of the code converter, the input of which readout is connected to the second input of the second OR element and with the second output of the reversible counter ... Information sources, . taken into account during the examination I. Study of the technical possibilities of building an automated operational device for end-to-end checking of KB and VHF radio channels during the transmission of discrete information in the process of adjustment and communication Report on SRW. L., LEIS, 1974, p. 29-32, 41-46 (prototype).