SU1283917A1 - Device for generating three-phase quasi-sine voltage - Google Patents

Abstract

The invention relates to electrical engineering and can be used in automation and electric drive systems to form a three-phase quasi-sinusoidal voltage. The purpose of the invention is to expand the functionality by providing a stepwise change in the phase of the output voltages. The device contains a controlled clock 1, through a reversible counter connected to the adder 4 connected to the output of the analog-to-digital converter (ADC) 3 the inputs of permanent storage devices (ROM) 5-7, the outputs of which through digital-analog converters 8-10 are connected to the output pins. And the control voltage level can be changed, the code at the ADC output and the resulting address code at the output of the adder 4 can be changed in steps. As a result of this phase, the output voltages also change in steps, which allows the device to be used in frequency-phase-locked systems regulation. 1 il. (L

Description

The invention relates to electrical engineering and can be used in automation and electric drive systems to form a three-phase quasi-sinusoidal voltage.

The purpose of the invention is to expand the functionality by providing a stepwise change in the phase of the output voltages.

The drawing shows a functional block diagram of the proposed device

The device contains a controlled generator of 1 clock pulses, a reversible counter 2, an analog-to-digital converter 3, an adder 4, permanent memory devices 5,6 and 7 and digital-to-analog converters 8.9 and 10. The generator input. 1 clock pulses are connected to a source of control voltage that determines the frequency of the output voltage of the device, and the outputs are connected to the inputs of the reversible counter 2. The input of analog-digital converter 3 is connected to a controlled voltage source that controls the phase of the output voltages, and the outputs are connected to the first inputs of the adder 4, the second inputs of the adder 4 are connected to the outputs of the reversible counter 2, the outputs of the same adder 4 are connected to the inputs of permanent memory devices 5, 6 and 7. The outputs of permanent memory devices 5,6 and 7 are connected to the inputs of the DACs 8,9, and 10, the outputs of which in turn are output devices.

The device works as follows.

The generator 1 of clock pulses under the action of the control voltage Uy generates a sequence of clock pulses with a frequency determined by the level of this voltage. The clock pulses are received either at the input of the addition or at the input of the subtraction of the reversible counter 2, depending on the sign of the control voltage Uy. Under the action of clock pulses at the input of the reversible counter, the latter generates either a rising or falling binary code at the output. Analog-to-digital converter 3 converts the input voltage U, which controls the phase of the output voltages to binary code. This code is summarized with the code.

the reversible counter 6 in the adder 4. The summation code is addressable to the persistent storage devices 5,6

and 7 and fed to their inputs. Discrete sampling codes of sinusoidal voltages with a shift of 120 al.

output frequency. The discrete sampling codes are fed to the inputs of digital-to-analog converters 8.9 and 10, where they are converted into stepped quasi-sinusoidal signals applied to the output of the device. If necessary, a step change in the phase of the output voltages changes the level of the control voltage U-. As a result, the code at the output of the analog-to-digital converter and the resulting address code at the output of the adder 4 change in steps. As a result, the phase of the output voltages of the digital-to-analog converters 8.9 and 10 also changes in steps.

The implementation of the device in the proposed manner allows to expand its functionality, since it provides the opportunity

step change in the phase of the output voltage in the desired limits, which allows the device to be used in closed-loop systems of frequency-phase regulation of high-speed

AC drives.

Claims (1)

Invention Formula A device for generating a three-phase quasi-sinusoidal voltage containing a controlled clock generator, a reversible counter, permanent memory devices and digital-analogue converters solvers, the inputs of digital-to-analog converters are connected to the outputs of permanent memory devices, and the outputs of a controlled clock generator are connected to the inputs of a reversible counter, characterized in that, in order to extend the functionality by providing stepwise output phase changes voltages, an adder and an analog-to-digital converter are additionally introduced into it, the input of which is connected to the input phase control input terminal of the device 12839174 The outputs, and the outputs, are connected to the first inputs of the sensor, and the outputs of the adder are connected to the adder, to the second inputs of which the outputs of the reversible counting device are connected to the inputs of permanent memory.