SU1001436A1 - Master generator of multi-step three-phase voltage - Google Patents

Description

The invention relates to a converter technique, and can be used as a driving signal generator of static frequency converters.

A device is known in which a quasi-sinusoidal three-phase voltage is formed by a block containing an adjustable DC source connected between the common point of switch keys and an adder, in parallel to which two chains are connected from a series connected primary half-winding of a transformer and a key element controlled from a high-frequency generator, each secondary semi-winding of said transformer is connected to the load also through a key element controlled by a trigger, and in d flip-flop is coupled to the output Ct of the switch.

The disadvantages of this device are complexity and volume.

and the presence of low-tech coiled elements,

Closest to the present invention is a multi-stage KF-waveguided three-phase voltage generating device containing an inverting amplifier with a unit gain, as well as an adjustable clock generator and a number equal to the number of output phases, Digital-to-Digital Binary code generators, whose outputs are connected to digital-to-analog converter inputs The inputs of the latter are also connected to a constant voltage level adjuster directly and through an inverting amplifier with a unit nym gain. Digital-functional generators in a known device contain a T-trigger with a counting input and a clock input, delay lines, a reversible binary counter, logic elements and a time sensor, including a reversing shift register, a trigger, and auxiliary logic elements.

The disadvantages of the known device are the complexity and the insufficiently high quality of the output voltage,

The purpose of the invention is to simplify the device and the quality of the output voltage.

The goal is achieved by the fact that the master generator of a multi-stage three-phase voltage, containing an inverting amplifier with a single gain, as well as an adjustable clock frequency generator, and a number equal to the number of output phases, digital-functional binary code generators, the outputs of which are connected to the inputs of digital-analog converters The inputs of the latter are also connected to the constant voltage level adjuster directly and are provided with a binary counter through the inverting amplifier. with the number of possible states equal to the number of sampling intervals on the period of a given approximated curve, the input of which is connected to the output of the adjustable clock generator, and the outputs to the corresponding inputs of digital-functional generators, the digital-functional generators made in the form of code converters, for example fixed storage devices that convert a binary counter to a code equivalent to the corresponding. corresponding to the level of discrete samples of an approximated curve,.

FIG. 1 shows the block diagram of the proposed generator; Fig. 2 is a timing diagram, and a code converter table explaining the operation of the device.

The device contains an adjustable oscillator 1 clock and (pulses, binary counter 2, digital-functional generators (code converters) 3, digital-analog converters 4, the generator of a constant voltage level 5, inverting amplifier 6 with a unit gain Uj - control voltage regulated clock pulse generator. Surge control of a constant voltage level adjuster.

In the code converter table, the following conventions are adopted: Address ROM of the code combination at the output of binary counter 2; 1, 2, .4,8, 16 - respectively, states 1 - 5th bits of the binary counter 2; VYHOA, Vyh.V, Vykh.S - code combinations at the outputs of code converters 3 of the corresponding phases; 1, 2,,: 6 - states of the corresponding bits of code 3 transducers acting on the corresponding control inputs of digital-analog converters 4; Kn is the output signal state of the code 3 transducers controlling the sign of the output voltages of the digital-analog converters 4

The output of the adjustable oscillator 1 clock pulses is connected to the counting input of binary counter 2, whose bit outputs are connected to the corresponding address inputs of code 3 transducers. The number of code 3 transducers is determined by the number of phases of the output voltage of the device and in this case is three. The outputs of the code 3 transducers are connected to the control inputs of the digital to analog transducers Q of each phase. In addition, the inputs of digital-to-analog converters k are also connected to the output of a constant voltage level setpoint generator 5 directly and through an inverting amplifier 6 with unity gain.

The device works as follows.

Under the action of the input clock pulses from the output of the adjustable oscillator 1 clock pulses binary counter 2 generates a linearly increasing binary code at the output. Under the action of this code, code binary combinations corresponding to the magnitude and sign of the approximated quasi-sinusoidal voltages of the corresponding phases appear at the outputs of code 3 transducers. The organization of code 3 transducers is chosen so that with a linearly increasing input binary code, output digital-to-analog converters k bipolar quasi-sinusoidal voltage. The organization of the code 3 transducers of all phases is the same and differs only in the shift

120 eLo degrees relative to the repetition period of the input address code. This allows a phase shift of 120 al. in the output voltages of the device and form a three-phase system. Signs of the output voltages are controlled using a control signal at the output of code 3 transducers and connecting a digital-to-analog converter to a constant-voltage level setting device 5 directly or via an inverting amplifier 6 with a unit gain.

Code 3 transducers can be executed by a serial connection of a linear decoder and a diode coder of the required configuration, or on the basis of programmable read-only memory, devices,

The implementation of the device in the proposed manner allows to simplify the construction of the driving signal generators of the frequency converters and to improve the quality of the output voltage.

invention formula

A master multi-stage three-phase voltage generator containing an inverting amplifier with a single gain, as well as an adjustable clock frequency generator, and

a number equal to the number of output phases, digital-functional binary code generators, the outputs of which are medianne with the inputs of digital-analog converters, and the inputs of the latter are also connected to a constant voltage level adjuster directly and through said inverting amplifier, characterized in that in order to simplify and improve the quality of the output voltage, it is equipped with a binary counter, with the number of possible states equal to the number of sampling intervals on the period of a given approximated curve, the input of which It is connected to an adjustable clock generator, and the outputs are connected to the corresponding inputs of digital-functional generators, the latter being in the form of code converters, for example, permanent memory devices that convert the binary code of the counter into a code equivalent to the level of discrete samples of the approximated curve about

Sources of information taken into account in the examination

1 „USSR Author's Certificate No. 283385, CL 02 M 1/03, 1969.

2a USSR Author's Certificate No., cl. H 02 M 7L8, 1978.

fig 1

Claims (1)

Claim The master generator of a multi-stage three-phase voltage, containing an inverting amplifier with a single gain, as well as an adjustable clock, and a number equal to the number of output phases, digital-functional binary code generators, the outputs of which are connected. us to inputs of digital-to-analog preob5 verters, wherein inputs latter are also connected to the setting element level of DC voltage directly and through said inverting amplifier, characterized ¹⁰ in that, in order to simplify and increase the output voltage quality, it is provided with a binary 'counter, the number of possible * states equal to the number of sampling intervals at the period of a given approximated curve, the input of which is connected to the output ^{1 of the} remote control of the adjustable clock generator, and the outputs to the corresponding inputs digital-functional generators, the latter being made in the form of code converters, for example, read-only memory devices that convert the counter binary code into a code 25 equivalent to the corresponding level of discrete samples of the approximated curve.