SU1275492A1 - Device for reading information - Google Patents

Abstract

The invention relates to the field of automation, in particular to devices for reading information. The purpose of the invention is to increase the accuracy of the device. The goal is achieved by removing the point emitters of the coordinate remover both from the operator’s hand and from the object surface, which eliminates the influence of the reflected signals on the coordinate measurement result. 1 hp f-ly, 5 ill.

Description

The invention relates to automation and computing and can be used to read and enter information into a computer, for example; for reading the coordinates of points inside cavities and depressions of complex spatial objects, in particular, in dentistry when morphometry the face and organs of the oral cavity.

 Purpose; the invention consists in increasing the accuracy of the device.

FIG. I presents the block diagram of the proposed device; Fig.2 constructive execution of the control unit; in fig. 3 - constructive, implementation of the integrator; in fig. 4 - constructive implementation of the demodulator; in fig. 5 - constructive excretion of removable coordinates.

The device includes a puller 1 coordinates, with sight 2, point receivers 3 ultrasonic vibrations, amplifiers-Formers 4, demodulators 5 frequency-modulated signals, control unit 6, switches 7, integrator 8, first power amplifier 9, driver 10 total and differential impulse sequences, the element And 11, the generator 12 pulses and the second amplifier 13 power.

The control unit 6 (FIG. 2) contains a frequency divider 14 connected to an input bus, a frequency divider 14, an adder 15 modulo two and a military counter-distributor 16, to the intermediate output of which is connected through valve 17 a second input of adder 5. Second input of valve 17 is connected to the output of the trigger 18, the clock input and the input of the zero setting of which are connected to the intermediate outputs of the counter-divider 16, to the other intermediate outputs of which the trigger 19 and the driver are connected

20 packets of pulses. Two outputs of the imaging unit 20 are connected to the inputs of the valves 21, 23 and 22, 24, respectively. The second inputs of the valves

21 and 22 are connected to the output 25-1 of the counter-divider. 16, and the second inputs of the 23 and 24 are to the output of the 16 counter, and the inverse of the output 25-1. Output 26 of divider 14 is connected to demodulators 5 (fig. 1), output 27 of adder 15, outputs 28 and 9 of counter-divider 16 are connected

to the shaper 10 (Fig. 1). The output 30 of the trigger 19, the outputs 25-1 - 25-4 and 31 of the counter-divider 16 is connected to the integrator 8 (Fig. 1). The outputs 32 and 33 of the valves 21 and 22 are connected to the first power amplifier 9 (Fig. 1), and to the outputs 34 and 35 of the valves 23 and 24 - the second power amplifier 13.

The device integrator 8 contains eight identical subcircuits, one of which is shown in r. 3. The subcircuit includes series-connected

element 2I-OR-NOT 36, divisor 37

frequency trigger 38 connected to

 divider 37 clock input element

2I-OR-NOT 39 and frequency divider 40.

Output divider 37 through trigger 41,

Q adder 42 modulo two and the trigger 43 is connected to the input of the zero setting of the trigger 38. The second input of the adder

42 is connected to the first input element 2I-W-NOT 36, the first and third inputs connected via trigger 44 with input 45 to one output of the corresponding demodulator 5 (Fig. 1). The input 46 (second) of the element 2I-IPI-NO 39 is connected to the output element And 11

Q (Fig. 1) the third input of the element 2I- OR-NOT 39 - to the output of the element 2ISH-NOT 36, and the fourth input to the inverse output of the trigger 43. The input 47 (second) of the element 2I-OR-NOT 36 is connected to the output of the driver 10 for the total sequence of pulses, and input 48 (fourth) with the output of the generator 10 for a differential sequence of pulses (Fig. 1). Clock inputs 25-1 (25-3),

 25-2 (25-4) and 30 triggers 44, 43 and 41 and the input 31 of the zero setting trigger

43 connected to the outputs of the control unit. In this case, for the chipset subschema integrator used output 25-1

 (25-2), and for the other four, output 25-3 (25-4). The outputs of the divider 40 are the outputs of the integrators 8.

The demodulator 5 of the device (FIG. 4) contains series-connected

counter-divider 49, trigger 50, connected to counter-divider 49 by a clock input, and counter-divider 51, connected to trigger 50 by an input of setting the initial value. The counter-divider 52 is connected to the output of the counter 49, the trigger 53 is connected to the output of the counter-divider 52, the trigger 54 is connected to the clock input to the output of the counter-divider 51. The counting inputs 26 of the separators 49 and 51 are combined and connected to the corresponding output of block 6 (FIG. 2). Inputs 55 serve. for setting the initial state of the counter-divider 51. The input 56 for setting the zero of the flip-flops 50 and 54 is connected via a switch (Fig. 1) to the overflow outputs 57 of the dividers 40 of the corresponding pair of integrator subcircuits (Fig. 3), one of which has an input 25-1 and the other is input 25-3 connected to block 6. The clock input of the trigger 53 and the input of the zero setting of the counter-divider 51 are connected to the output of the trigger 54, the clock input of which is connected to the output of the counter-divider 51.

The input 58 for setting the zero of the counter 49 is connected to the output of the amplifier-former 4 (FIG. 1). The input of the zero setting of the divider counter 52 is connected to the inverse output of the trigger 50 The output 45 of the trigger 53 is the output of the demodulator connected to the input of the corresponding subcircuit of the integrator 8 (Fig. 1)

The coordinate remover 1 (Fig. 5) contains two tube elements 59 and 60 fixed relative to each other on the same straight line (axis) with the help of the holder 61. The center pointer 62 is mounted on the end of the tube 59. The opposite end of the tube has a waveguide 63, open at the end of the tube. An electro-acoustic transducer 64 is located inside the waveguide. A similar construction with a waveguide 65 and an electro-acoustic transducer 66 has a tube 60. The electro-acoustic transducers 64 and 66 are connected to the corresponding power amplifiers 9 and 13 with cables 67. The axis of the center-pointer 62 coincides with the axis of the waveguides, and the tip of the centering head 62 is at a distance of.-h from the open end of the tube 59 and at a distance of 2 from the open end of the tube 60, where, 4d; d is the diameter of the waveguide at the end of the tube; h is the distance of the radiation center from the waveguide end.

The device works as follows (Fig. 1).

When power is turned on, generator 12, stabilized

by frequency. The signal of the generator 12 through the element 11 is supplied to the control unit .6, and thereby determines the frequencies of all the support, clock and control signals in the device.

In the control unit (Fig. 2), the frequency of the input signal (meander) is divided into two by means of divider 14, from the output of which the signal goes through adder 15 to the input of counter separator 16. In FIG. 2 shows the frequency division factors of the dividers.

14 and 16 at their exits. Other elements of the control unit are designed

to modulate (manipulate) the frequency, and the counter-divider 16 also participates in this operation. The signal from the latter, arriving at the valve 17, when the enable signal at the second input of this valve is modulated two on the adder

15 with a signal whose frequency is four times higher. The sum (in frequency) signal is the input to counter divider 16. The enable signal for the summing operation enters valve 17 from trigger 18 once in a half cycle of operation.

| device.

Using shaper 20, HMnynbi packets are formed in such a way that the packet starts with a predetermined number of pulses of one frequency, then pulses with a different frequency arrive, and at the rest of the cycle time there are no signals at the shaper output. The emission of signals in the form of such packets allows

to ensure high accuracy of the device, since it practically excludes the influence of reflected signals (frequency shift key is produced at the beginning of the packet).

The signals at the two outputs of the driver are shifted by half the period of the corresponding frequency and are designed to run two switching circuits in each amplifier 9 and 13.

power (Fig. 1). One of the two power amplifiers is started through gates 21 and 22, connected by the first inputs to the corresponding outputs of the driver 20 and

second entrances to exit 25-1

counter divider 16. The launch of the second power amplifier is performed through valves 23 and 24 in the same way.

thus, the counter-divider 16 receives a signal inverse to the signal from output 25-1.

The signals at the outputs 27-29 of the control unit ensure the operation of the imaging unit 10 (Fig. 1). The outputs of the latter have a cumulative sequence, including a sequence of pulses with a frequency of 2750 kHz, plus one additional pulse per device operation cycle, since the total frequency is 2750 + 0.172 kHz, and a difference sequence, including a sequence of pulses at a frequency of 2750 kHz minus one pulse per cycle . the difference frequency is 27500, 172 kHz. The signals of the first frequency are generated by summing modulo two pulses obtained by differentiating the fronts and cuts of the signal from output 28, with a sequence of pulses obtained by differentiating between the fronts and cuts of the signal from the output 29 of the control unit, and receiving the second frequency sins is performed by disabling one pulse during a cycle in a pulse train using the same source signals.

The output signal 27 is used as a clock for the triggers in the imaging unit 10 (to eliminate the time delay of the output signal 29).

The signals from p. 25-1, 25-2, 25-4, 30 and 31 are used to control integrator 8 (Fig. 1). The purpose of the integrator is to obtain parallel distance codes from the emitters to the receivers. The integrator, together with switches 7, demodulators 5, amplifiers-formers 4 and receivers 3, form eight independent digital tracking systems, in each of which the distance code is calculated by double integration of the time signals +1 or -1 at the output of the corresponding demodul torus.

The main feature of the integrator is that the speed and distance in it are represented by unitary (single) codes or, what is the same, time delays of signals, i.e. double integration of time intervals is performed. The speed is represented by the delay at the output of the divider 37 (Fig. 3) relative to the signal coming from the control unit to the input 25-4. To receive a delay in the signal at the output of the divider 37, its counting input from element 2I-OR-NO 36 is received in accordance with the demodulator signal controlling this element through input 45 and trigger 44, total (input 47) or difference ( input 48) pulse sequences.

The distance is represented by the delay.

5 signals at the output of the divider 40. Triggers 38 and 43 and element 2I-OR-NO 39 provide transmission of the signal (i.e., speed) from divider 37 to the divider 40 once per cycle.

0 this transfer can be only when the enable signal 1 is at the input of the trigger 43. If there is no permit signal in a certain cycle, then the triggers 43 and 38 remain at zero

5 states, and the input of the divider 40 receives the same total or difference pulse train as the input of the divider 37. This happens when the signs of ycRope0 and the speed are different (case

overshoot; for example, the speed is positive and the acceleration is negative). If the enabling signal for integration was always, i.e.

If the system was linear, then, as in the second-order system (there are two serially connected integrators), oscillations would occur that reduce accuracy due to Q due to the time-consuming transient process. Trigger 41, once per cycle, remembers the speed sign when the signal at output 30, and modulator 42 modulo two, 5 which compares the sign of the speed signal from the trigger output 41 and the acceleration sign from the demodulator at input 45, allowing They are completely free from oscillations in the system and thereby increase the speed and accuracy.

When the enable signal is 1, at the input of the trigger 43, the signal from the control unit at input 31 allows the control unit at input 25-4 to set the trigger 43 to the state of one. Thereby, transmission from

input of the divider 40 of the total or differential pulse sequence and switching of the trigger 38 to the state of one by the signal from the output of the divider 37 is allowed. The signal thus obtained at the output of the trigger 38 allows the pulse sequence with the double frequency from the output of the And 11 element to pass to the input of the splitter 38 ( Fig. 1) to the input 46 of the integrator. Obviously, if the interval corresponding to the duration of the pulse supply with double frequency is exactly half the pulse width of the permitting signal, then there is no change in the signal delay at the output of the divider 40 in this cycle. This case corresponds to zero speed. If the speed is more than 20 times zero (the distance increases), then the pulse counting interval with the double frequency should be less. half of the duration of the enabling pulse, since the signal at the output of the divider 40 should receive an additional delay in this cycle equal to the delay signal of the speed at the output of the divider 37. In case of a negative speed, the result is opposite: the signal at the output of the divider 40 decreases (the distance during movement radiator to the receiver). The construction of an integrator using frequency dividers makes it possible to obtain in the divider 40 a parallel code of the magnitude of the distance due to blocking the signal of the generator 12 using the AND 11 element with the input signal. A parallel code can be introduced into an electronic computer without additional transformations. It is this generator lock that intervenes. A computer (not shown) performs an interlock by the signal of control unit 6. This not only provides reads of the parallel code from the divider 40, but also further increases the accuracy of the device due to the fact that the period of radiation of the pulse packets turns out to be a random value, and this reduces the impact on the accuracy of the device of the reflected signals (because the integrator’s digital tracking is robust with respect to single random interference).

The overflow pulses of divider 40 from output 57 are used to control the demodulator (Fig. 4). Since one demodulator is

A signal emitting in series from two emitters is connected to two subcircuits of the integrator Sfig. 3), the outputs from the integrator to each of the four demodulators are sequentially connected using the respective four switches 7, each of which has two inputs. In this case, the signals from the two outputs of 57 two subcircuits of the integrator

Claims (2)

It is conveniently fed to the input 56 and set the zeros of the demodulator trigger 50 and 54. The output of the demodulator trigger 53 is connected in parallel with the inputs 45 of the same two subschets of the integrator. In this case, the pulse distributor is not required for two channels, since the clock inputs of the flip-flops 44 of the two integrator subcircuits are connected to different outputs 25-1 and 25-3 of the control unit. The output 26 of the counter-divider 49 from the control unit 6 receives a signal with a given frequency in the form of an uninterrupted sequence of counting pulses, and the input 58 receives a signal from the output of the amplifier-former 4. With this signal, the counter-divider 49 is set to zero. The frequency of the pulses at the output of the counter is equal to the frequency of the signal at input 58. The purpose of this counter is to eliminate bounce on the fronts and cuts of the input signal. The principle of the demodulator operation is that the input signal analysis starts at a signal at its input 56. In this case, after setting zero of the trigger 50, the very first edge of the pulse at the output of the counter-divider 49 switches the trigger 50 to the unit state. This moment is the beginning of the comparison of two time intervals: the interval determined by the level signal at the output of the counter divider 52, which includes the integer number of input signal periods, and the measuring interval formed by the counter divider 51 (the calculated duration of the second interval is provided by setting the required the initial state of the separator counter 51 by connecting the inputs 55 to the buses O, 1). The front of the signal from the output of the counter-divider 51 switches the trigger 54 to the unit state and thereby fixes the trigger 53 of the output signal of the splitter counter 52. The work of the two radiator reticle is based on the fact that it is possible to obtain an almost point source of radiation using a cylindrical waveguide. In the narrow tube of the waveguide 63 (65), harmonic oscillations are excited using an electro-acoustic transducer 64 (66) located at one end of the waveguide. The oscillations propagate along the axis of the waveguide, and the second, open, end of the waveguide emits a signal. In this case, the radiation center is located outside the waveguide at some distance from its end. Such an arrangement of the radiation center makes it possible to obtain a radiation source with practically a spherical radiation pattern, which is necessary in the proposed device. Claim 1. An information reading device comprising an AND element, one input of which is an input of a device, and an output connected to an input of a control unit whose outputs are connected to a first power amplifier, to an integrator whose output is an output of a device These are the inputs of demodulators, the other inputs of which are connected to the corresponding amplifier-formers, and the outputs are connected to the integrator, a coordinate remover, one input of which is connected to the output of the first power amplifier, and the output is acoustic It is connected with the inputs of point receivers of ultrasonic vibrations, the outputs of which are connected to the inputs of corresponding amplifiers-formers, characterized in that, in order to increase the accuracy of the device, it contains a generator of total and difference pulse sequences, the input of which is connected to the control unit, and the output is connected to one input of the integrator, the other input of which is connected to the output of the element I, the second power amplifier, the input of which is connected to the output of the control unit, and the output connected to the other input puller coordinate switches whose inputs are connected to the outputs of the integrator and the control unit, and outputs connected to inputs of the respective demodulators and the generator, pulses, connected to the other input member I. 2. A device according to claim 1, characterized in that the coordinate remover is made in the form of two waveguides fixed one relative to the other with point sources of ultrasonic vibrations located on the same straight line with the viewfinder. L / 8.G M 3 47 9 jff l one fl 25g Llwtl ti je h Pu.t.3 sixteen Centre 62 Fi.5