SU1264159A1

SU1264159A1 - Device for preparing data

Info

Publication number: SU1264159A1
Application number: SU853848792A
Authority: SU
Inventors: Владимир Михайлович Литвин; Владимир Борисович Матвеев; Сергей Вениаминович Тарасов; Фердинант Хасанович Шакирзянов
Original assignee: Казанский Ордена Трудового Красного Знамени И Ордена Дружбы Народов Авиационный Институт Им.А.Н.Туполева
Priority date: 1985-01-24
Filing date: 1985-01-24
Publication date: 1986-10-15

Abstract

Изобретение относитс к области вычислительной техники и может быть использовано в системах подготовки данных. Целью изобретени вл етс повышение быстродействи устройства. Введение в известное устройство дополнительных двух элементов ИЛИ, п ти элементов И, трех триггеров, ререгистра и элемента сравнени позвол ет проводить три режима работы устройства: ввод информации в блок буферной пам ти, автоматическую проверку информации в буферной пам ти и перезапись проведенной информации из буферной пам ти в блок внешней пам ти. Возможность проведени автоматического контрол страниц переменной длины исключает необходимость проведени коррекции инфор Ф мации и, следовательно, позвол ет (Л повысить быстродействие ввода информации в среднем в 1,5 раза. Кроме того, использование переменной длины страниц приводит к уменьшению расхода носител информации внешней пам ти. 2 ил. ю ел The invention relates to the field of computer technology and can be used in data preparation systems. The aim of the invention is to improve the speed of the device. An introduction to the known device of the additional two elements OR, five elements AND, three triggers, a register and a comparison element allows three modes of operation of the device: entering information into the buffer memory block, automatically checking information in the buffer memory and rewriting the information held from the buffer memory into an external memory block. The ability to automatically control variable-length pages eliminates the need for information correction and, therefore, allows (L to increase the speed of information input by an average of 1.5 times. In addition, the use of variable page lengths reduces the consumption of external storage media 2 Ill. Ate

Description

Изобретение относится к вычислительной технике и может быть использовано в системах подготовки данных.The invention relates to computer technology and can be used in data preparation systems.

Цель изобретения - повышение быстродействия устройства,The purpose of the invention is to increase the speed of the device,

На фиг.1 приведена структурная схема устройства, на фиг.2 - временные диаграммы работы распределителя импульсов.Figure 1 shows the structural diagram of the device, figure 2 is a timing diagram of the operation of the pulse distributor.

Устройство содержит клавиатуру 1, блок элементов ИЛИ 2, первый регистр 3, блок буферной памяти 4, первый элемент сравнения 5, первый элемент И 6, первый элемент ИЛИ 7, первый триггер 8, распределитель импульсов 9, второй элемент И 10, второй элемент ИЛИ 11, блок внешней памяти 12, счетчик 13, третий элемент ИЛИ 14, третий элемент И 15, четвертый элемент И 16, пятый элемент И 17, второй триггер 18, третий триггер 19, четвертый элемент ИЛИ 20, четвертый триггер 21, шестой элемент И 22, седьмой элемент И 23, второй регистр 24, второй элемент сравнения 25, первую 26, и вторую 27 группы входов блока ИЛИ 2, вход 28 и выходы 29,30 и 31 распределителя импульсов 9.The device comprises a keyboard 1, a block of OR elements 2, a first register 3, a buffer memory unit 4, a first comparison element 5, a first AND element 6, a first OR element 7, a first trigger 8, a pulse distributor 9, a second AND element 10, a second OR element 11, the external memory unit 12, counter 13, the third element OR 14, the third element AND 15, the fourth element AND 16, the fifth element AND 17, the second trigger 18, the third trigger 19, the fourth element OR 20, the fourth trigger 21, the sixth element AND 22, the seventh element And 23, the second register 24, the second comparison element 25, the first 26, and the second 27 g uppy OR input unit 2, the input 28 and the outputs 29,30 and 31 of the distributor 9 pulses.

Устройство работает следующим образом.The device operates as follows.

При рассмотрении работы устройства можно выделить режим ввод информации в блок буферной памяти_} режим проверки информации в буферной памяти и режим перезаписи проверенной информации из буферной памяти в блок внешней памяти. Б исходном состоянии устройст во находится в режиме ввода инфбрмации в блок буферной памяти. Триггеры 18,19 и 21 установлены в нулевое состояние. Сигналы с нулевых выходов триггеров 19 и 21 через элемент И 22 разрешают производить запись информации в блок буферной памяти. Обмен информацией производится словами определенной длины. При вводе каждого слова (например, при нажатии на клавишу клавиатуры) с клавиатуры 1 вырабатывается сигнал, по которому через элемент ИЛИ 7 и триггер 8 по входу 28 задействуется распределитель импульсов 9, который на выходах 29,30 и 31 выдает серии импульсов (фиг.2). Информационное слово с клавиатуры 1 через блок элементов ИЛИ 2 поступает в регистр 3. По сигналу с выхода 29 распределителя импульсов 9 слово записывается в блок 4 буферной памяти. Затем по сигналу с выхода 31 содержимое счетчика 13 увеличивается на единицу. По этому же сигналу через элементы И 10, ИЛИ 11 и триггер 8 запрещается выдача импульсов с распределителя импульсов 9.When considering the operation of the device, one can distinguish the mode of entering information into the buffer memory unit _{} the} mode of checking information in the buffer memory and the mode of overwriting the verified information from the buffer memory into the external memory block. In the initial state, the device is in the mode of inputting information into the buffer memory block. Triggers 18.19 and 21 are set to zero. The signals from the zero outputs of the triggers 19 and 21 through the element And 22 allow you to record information in the buffer memory block. Information is exchanged with words of a certain length. When you enter each word (for example, when you press the keyboard key) from the keyboard 1, a signal is generated by which the pulse distributor 9 is activated via the OR element 7 and trigger 8 at the input 28, which generates a series of pulses at the outputs 29.30 and 31 (Fig. 2). The information word from the keyboard 1 through the block of elements OR 2 enters the register 3. By the signal from the output 29 of the pulse distributor 9, the word is recorded in the block 4 of the buffer memory. Then, by a signal from output 31, the contents of counter 13 are increased by one. By the same signal through the elements AND 10, OR 11 and trigger 8, the issuance of pulses from the pulse distributor 9 is prohibited.

На этом заканчивается цикл ввода одного слова в блок 4 буферной памяти. Аналогичным образом записываются последующие слова страницы информации. Длина страницы определяется исходя из удобства разбивки вводимого массива. После формирования страницы информации с клавиатуры 1 вырабатывается сигнал конца страницы (например, при нажатии на определенную клавишу на клавиатуре). По этому сигналу содержимое счетчика 13 переписывается в регистр 24 для запоминания длины страницы информации, записанной в блок 4 буферной памяти. По этому же сигналу через элемент ИЛИ 14 сбрасывается счетчик 13 и через элемент ИЛИ 14, И 16 триггеры 18 и 19 устанавливаются в единичное состояние, сигналы с единичных выходов которых задают режимы проверки информации, записанной в блок 4 буферной памяти. В режиме проверки данных повторно набирается страница информации. Как и в случае ввода информации в блок буферной памяти при наборе каждого слова задействуется распределитель импульсов 9, который выдаёт серию импульсов. Само слово с клавиатуры 1 через блок элементов ИЛИ 2 поступает в регистр 3. Сигнал с нулевого выхода триггера 19 через элемент И 22 разрешает чтение блока 4 буферной памяти. По сигналу с выхода 29 распределителя импульсов 9 происходит чтение из блока буферной памяти 4 по данному адресу, одновременно сравнивается содержимое регистра 3 и блока буферной памяти 4 и результат сравнения через элемент И 6 поступает на клавиатуру 1, так как сигнал с единичного выхода триггера 19 разрешает срабатывание элемента И 6. Если сравнение произошло, то по сигналу с управляющего выхода 31 содержимое счетчика 13 увеличивается на единицу и можно ввести следующее слово. Если сравнение не произошло, то устройство блокируется : и вручную (например, нажатием клави4This completes the cycle of entering one word into block 4 of the buffer memory. Subsequent words of the information page are recorded in a similar manner. The page length is determined based on the convenience of splitting the input array. After the formation of the information page from the keyboard 1, an end-of-page signal is generated (for example, when a certain key on the keyboard is pressed). According to this signal, the contents of the counter 13 are written to the register 24 for storing the length of the page of information recorded in the block 4 of the buffer memory. According to the same signal, counter 13 is reset via OR element 14 and triggers 18 and 19 are set to a single state through OR element 14, AND 16, the signals from the unit outputs of which specify the modes for checking information recorded in block 4 of the buffer memory. In data verification mode, the information page is re-dialed. As in the case of inputting information into the buffer memory block, each word is typed using a pulse distributor 9, which generates a series of pulses. The word itself from the keyboard 1 through the block of elements OR 2 enters the register 3. The signal from the zero output of the trigger 19 through the element And 22 allows the reading of block 4 of the buffer memory. The signal from the output 29 of the pulse distributor 9 reads from the buffer memory block 4 at this address, at the same time, the contents of register 3 and the buffer memory block 4 are compared and the comparison result is sent to keyboard 1 through the And 6 element, since the signal from the trigger output 19 allows triggering of AND element 6. If a comparison has occurred, then, by a signal from the control output 31, the contents of the counter 13 are increased by one and the next word can be entered. If the comparison does not happen, then the device is blocked: and manually (for example, by pressing key 4

1264 ши на клавиатуре) может быть деблокировано . Сигнал деблокирования с клавиатуры 1 сбрасывает триггер 19 в нулевое состояние, и устройство устанавливается в режим Ввод, сигнал с 5 нулевого выхода триггера 19 через элемент И 22 разрешает запись в блок 4 буферной памяти. Набирается исправленное слово информации, которое с блока ввода данных через блок ИЛИ 2 ¹⁰ и регистр 3 записывается в блок 4 буферной памяти по сигналу с выхода распределителя импульсов 9. Сиг- нал с выхода 31 распределителя импульсов 9 увеличивает содержимое ¹⁵ счетчика 13 на единицу и через элемент И 23 устанавливает триггер 19 в единичное состояние, т.е. устройство вновь переходит в режим проверки, и можно продолжать проверку ^гоинформации, записанной в блок 4 буферной памяти. В конце страницы информации происходит сравнение содержимого счетчика 13 и регистра 24, и сигнал с элемента сравнения ²⁵25 через элемент ИЛИ.14 и И 16 устанавливает триггеры 18 и 19 в нулевое состояние. Кроме того, через элементы ИЛИ 14, И 16, И 17 и ИЛИ 20 устанавливает триггер 21 в единичное 30 состояние. Сигнал с единичного выхода триггера 21 разрешает запись в блок внешней памяти, а также через элемент ИЛИ 7, триггер 8 запускает распределитель импульсов 9, ко- 35 торый вырабатывает непрерывные серии управляющих сигналов на все время записи страницы информации в блок буферной памяти, т.е. сигнал с нулевого выхода триггера 21 запрещает 40 прохождение сигнала с выхода 31 распределителя импульсов 9 и сброс триггера 8. Также сигнал с нулевого выхода триггера 21 через элемент И 22 устанавливает блок 4 буферной памя- 45 ти в состояние чтения. По сигналу с выхода 29 распределителя импульсов 9 слово информации из блока 4 буферной памяти через блок элементов1264 chi on the keyboard) can be unlocked. The release signal from the keypad 1 resets the trigger 19 to zero, and the device is set to the Input mode, the signal from the 5th zero output of the trigger 19 through the And 22 element allows recording in block 4 of the buffer memory. A corrected information word is typed, which is written from the data input unit through the OR block 2 ¹⁰ and register 3 to the buffer memory unit 4 by the signal from the output of the pulse distributor 9. The signal from the output 31 of the pulse distributor 9 increases the content ^{15 of the} counter 13 by one and through element And 23 sets the trigger 19 in a single state, i.e. the device reverts to the test mode, and you can continue checking ^of the information recorded in block 4 of the buffer memory. At the end of the information page, the contents of the counter 13 and the register 24 are compared, and the signal from the comparison element ²⁵ 25 through the OR element 14 and AND 16 sets the triggers 18 and 19 to the zero state. In addition, through the elements of OR 14, AND 16, AND 17 and OR 20 sets the trigger 21 in a single 30 state. The signal from the single output of flip-flop 21 allows writing to an external memory unit, and also via OR element 7, flip-flop 8 triggers a pulse distributor 9, which generates continuous series of control signals for the entire time the information page is written to the buffer memory unit, i.e. . the signal from the zero output of the trigger 21 prohibits 40 signal passage from the output 31 of the pulse distributor 9 and the reset of the trigger 8. Also, the signal from the zero output of the trigger 21 through the And 22 element sets the buffer memory unit 4 to the read state. According to the signal from the output 29 of the pulse distributor 9, a word of information from block 4 of the buffer memory through the block of elements

ИЛИ 2 поступает в регистр 3, затем 50 из регистра 3 по сигналу с выхода поступает в блок внешней памяти 12. По сигналу с выхода 31 содержимое счетчика 13 увеличивается на единицу.OR 2 enters register 3, then 50 from register 3 on a signal from the output enters the block of external memory 12. On a signal from output 31, the contents of the counter 13 is increased by one.

В конце страницы сигнал с элемента 55 сравнения 25 через элемент ИЛИ 14, И 15, ИЛИ 20 устанавливает триггер 21 в нулевое состояние. На этом за- канчивается цикл ввода в устройство подготовки данных одной страницы информации. Аналогично вводятся остальные страницы.At the end of the page, the signal from comparison element 55 through element OR 14, AND 15, OR 20 sets trigger 21 to zero. This completes the cycle of entering into the data preparation device one page of information. The other pages are entered in the same way.

Таким образом, введение режима автоматического контроля страниц переменной длины позволяет повысить быстродействие устройства. По сравнению с устройством подготовки данных ЕС-9002 (прототип) предлагаемое устройство позволяет повысить быстродействие ввода информации в среднем в 1,5 раза (в прототипе на запись одной страницы затрачивается примерно 30 с, на проверку в среднем 32 с и на исправление ошибок (коррекцию) в среднем 30 с), всего затрачивается 92 с. В предлагаемом устройстве на запись одной страницы затрачивается 30 с на проверку 30 с, производить коррекцию нет необходимости. Всего затрачиваетсяThus, the introduction of automatic control of variable-length pages allows you to increase the speed of the device. Compared with the data preparation device EU-9002 (prototype), the proposed device can increase the speed of inputting information by an average of 1.5 times (in the prototype, it takes about 30 s to write one page, 32 s to verify on average and to correct errors (correction ) on average 30 s), it takes 92 s. In the proposed device, it takes 30 s to write one page to check 30 s, there is no need to make corrections. Total spent

с.from.

Кроме того, использование переменной длины страниц позволяет уменьшить расход носителя информации внешней памяти.In addition, the use of variable page lengths can reduce the consumption of external storage media.

Claims

The invention relates to numeral technology and can be used in data preparation systems. The purpose of the invention is to increase the speed of the device. Figure 1 shows the block diagram of the device, figure 2 - timing diagrams of the distributor hippulsov. The device contains a keyboard 1, a block of elements OR 2, the first register 3, a block of buffer memory 4, the first element of comparison 5, the first element AND 6, the first element OR 7, the first trigger 8, the pulse distributor 9, the second element AND 10, the second element OR 11, external memory block 12, counter 13, third element OR 14, third element AND 15, fourth element AND 16, five elements AND 17, second trigger 18, third trigger 19, fourth element OR 20, fourth trigger 21, the sixth element And 22, the seventh element And 23, the second register 24, the second element of the comparison 25J first 26, and the second 27 g Unit inputs of the block OR 2, input 28 and outputs 29.30 and 31 of the pulse distributor 9 o The device works in the following way. When considering the operation of devices, it is possible to distinguish the mode of entering information into the block of buffer memory checking information in the buffer memory and the mode of overwriting verified information from the buffer memory into the external memory block. In its initial state the device is in the mode of entering information into the block Buffer Memory Triggers 18,19 and 21 are set to zero. The signals from the zero outputs of the flip-flops 19 and 2G through the element 22 allow you to record information in the buffer memory block. Information is exchanged with words of a certain length. When you enter each word (for example, J when you press a key on the keyboard) from keyboard 1, a signal is generated by which pulse distributor 9 is activated via element OR 7 and trigger 8 at input 28, which outputs outputs of pulse series 29s30 and 31 (Fig. 2). An information word from the keyboard 1 through the block of elements OR 2 enters the register 3. By a signal from the output 29 of the pulse distributor 9, the word is written into the block 4 of the buffer memory. Then, by the signal from output 31, the contents of counter 13 are increased by one. The same signal through the elements 10, OR 11 and trigger 8 prohibits the issuance of pulses from the pulse distributor 9. This completes the cycle of inputting one word to the block 4 of the buffer memory. Likewise, the subsequent words of the information page are recorded. The page length is determined by the convenience of splitting the input array. After forming a page of information from the keyboard 1, a signal for the end of the page is generated (for example, by pressing a certain key on the keyboard). By this signal, the contents of counter 13 are copied to register 24 for storing the page length of information recorded in buffer storage unit 4. By the same signal, through the OR element 14, the counter 13 is reset and through the OR element 14 and 16 the triggers 18 and 19 are set to one state, the signals from the single outputs of which specify the modes of checking the information recorded in the buffer storage unit 4. In the data verification mode, the information page is recalled. As in the case of inputting information into the buffer memory block, when typing each word, pulse distributor 9 is activated, which produces a series of pulses. The word itself from the keyboard 1 through the block of elements OR 2 enters the register 3. The signal from the zero output of the trigger 19 through the element 22 permits reading of the block 4 of the buffer memory. The signal from the output 29 of the pulse distributor 9 reads from the block of buffer memory 4 to this address, the contents of register 3 and block of buffer memory 4 are compared at the same time and the result of the comparison through AND 6 enters the keyboard 1, because the signal from the single trigger trigger 19 allows the triggering of the element 6. If the comparison has occurred, then the signal from the control output 31 increases the counter 13 and increases by one, and the next word can be entered. If the comparison did not occur, the device is locked and manually (for example, by pressing the key on the keyboard) can be unlocked. The enable signal from the keyboard 1 resets the trigger 19 to the zero state, and the device is set to Input mode, the signal from the zero output of the trigger 19 through the And 22 element allows writing to the buffer storage unit 4. A corrected information word is typed, which from the data entry block through the OR 2 block and the register 3 is written to the buffer memory block 4 by the signal from the output of the pulse distributor 9. The signal from the output 31 of the pulse distributor 9 increases the content. the counter 13 per unit and through the element I 23 sets the trigger 19 to the one state, i.e. the device reverts to the check mode, and it is possible to continue the check of the information recorded in block 4 of the buffer memory. At the end of the information page, the contents of the counter 13 and the register 24 are compared, and the signal from the comparison element 25 through the element OR.14 and AND 16 sets the triggers 18 and 19 to the zero state. In addition, through the elements OR 14, AND 16, AND 17, and OR 20 sets the trigger 2t to one state. The signal from the single output of trigger 21 permits writing to the external memory block, as well as through the OR element 7, trigger 8 starts the pulse distributor 9, which produces continuous series of control signals at all times during the recording of the information page to the buffer memory block, t . the signal from the zero output of flip-flop 21 prohibits the passage of the signal from the output 31 of pulse distributor 9 and the resetting of flip-flop 8. Also, the signal from the zero output of flip-flop 21 through AND 22 sets the block 4 of the buffer memory to the reading state. According to the signal from output 29 of pulse distributor 9, the word of information from block 4 of the buffer memory through the block of elements OR 2 enters register 3, then from register 3 via the signal from output 30 enters the block of external memory 12. According to signal from output 31, contains the counter 13 is increased by ones. At the end of the page, the signal from the comparison element 25 through the element OR 14, AND 15, OR 20 sets the trigger 21 to the zero state. At this point, the cycle of inputting data from a single page of information into the device for preparing data is completed. Similarly, the remaining pages are entered. Thus, the introduction of automatic control of variable length pages allows to increase the speed of the device. Compared with the EC-9002 data preparation device (prototype), the proposed device allows an increase in the speed of information input by an average of 1.5 times (in the prototype, one page takes approximately 30 seconds to write, an average of 32 seconds to check and an error correction ( correction), on average, 30 s), totaling 92 s. In the proposed device, recording one page takes 30 seconds to check 30 seconds, there is no need to make corrections. It takes 60 seconds. In addition, the use of variable page lengths reduces the consumption of external storage media. Claims An apparatus for preparing data comprising a keyboard, an OR block, a first register, a buffer memory block, a first comparison element, a first and second AND elements, a first and second OR elements, a first trigger, a pulse distributor, an external memory block, a counter, the outputs of which are connected to the address inputs of the external and buffer memory blocks, the outputs of the latter are connected to one input of the block of OR elements and to the same inputs of the first comparison element whose output is connected to the first input of the first AND element The output of which is connected to the input of the keyboard, the first output of which is connected to the first input of the first element OR, the output of which is connected to the installation input to 1 of the first trigger, the non-inverting output of which is connected to the input of the pulse distributor, the first output of which is connected to the counting input of the counter and the first the input of the second element And, the output of which is connected to the first input of the second element OR, the output of which is connected to the input of the installation in O of the first trigger, the second output of the pulse distributor is connected to the input Ch a record of the external memory unit, whose data inputs are combined with the data inputs of the buffer memory block, with other inputs of the first comparison element and connected to the inputs of the first register, whose inputs are connected to the outputs of the OR element block, other inputs of which are connected to the outputs of the group keyboard, the third output of the pulse distributor is connected to the Read-write input of the buffer memory block, the outputs of the external memory block are the outputs of the device, which are characterized by the fact that in order to increase the speed of the device, the third and fourth elements OR, the third, the fourth, the fifth, the sixth, the seventh elements are AND, the second, the third, the fourth triggers, the second register, the second element of the comparison; the output of which is connected to the first input of the third element OR the output of which is connected to the reset input of the counter, to the first inputs of the third and fourth elements AND, the output of the fourth element AND connected to the first input of the fifth element And and to the synchronous inputs of the second and third triggers, non-inverting output of the third trigger connected to the second inputs of the first and fifth elements AND, the fifth element AND is connected to the first 1 input of the fourth 9 element OR, the output of which is connected to the synchronous input of the fourth trigger, a non-inverting output to Expensively connected to the control input of the external memory block, with the second inputs of the first element OR and the third element AND, the output of which is connected to the second outputs of the second and fourth elements OR, the non-inverting output of the fourth trigger And connected to the second inputs of the second and fourth elements AND the input of the sixth element And, the second input of which is connected to the inverting output of the third trigger, the installation input in 1 of which is connected to the output of the seventh element And, the first input of which is connected to the output of the second trigger Era, the second input of the seventh And element is connected to the first output of the pulse distributor, the installation inputs in O of the third and fourth triggers are connected to the second output of the keyboard, the third output of which is connected to the second input of the third OR element and the synchronous input of the second register, whose information inputs are connected to the outputs the counter and with one of the inputs of the second comparison element, the other inputs of which are connected to the outputs of the second register, the output of the sixth element AND are connected to the control input of the buffer memory block.

FIG. 2