SU1262481A1 - Multiplying device - Google Patents

Abstract

The invention relates to the field of computing and can be used in the development of high-speed devices for multiplying decimal numbers. The aim of the invention is to reduce the amount of equipment in the apparatus. The goal has been achieved by introducing into the device a merge unit consisting of m groups of OR elements, and the nodes multiplied by six and the summation nodes are binary. At the same time, the outputs of the two highest subgroups of each of the m groups of inputs of the partial product formation unit are connected to the inputs of the corresponding group of OR elements, the outputs of which plug 1 to the inputs of the binary summation unit in accordance with the values of the weights of the bits. The outputs of the tetrads from the first to the penultimate of the binary summation block are connected in accordance with the values of the weights of the bits to the second inputs of the corresponding summation nodes, the outputs of which are connected to the SS inputs of the corresponding converter (Lei of the DOUBLE code to the decimal, the outputs of which are connected to the inputs of the bits block of ten summation in accordance with the values of the weights of bits, 2, or N9 O5 to 4i 00

Description

The invention relates to computing and can be used. However, in the development of high-speed devices for multiplying decimal numbers,

The purpose of the invention is to reduce the amount of equipment of the device.

FIG. 1 shows the structural scheme of the proposed device for multiplication; in fig. 2 is a functional block diagram of the union when.

The multiplying device contains (Fig. 1) registers 1-3, respectively, multiplicative, multiplier and multiplication, multiplicative multiplication unit 4, partial product formation compiler 5, combination unit 6, binary summation unit 7, tetrad transfer summation unit 8, correction unit 9 and block 10 decimal summation. Block 8 contains nodes P, .- 11, summation of tetrad transfers, block 9 contains nodes, multiplied by six, nodes 13 13, jf., Summation and converters l, -i of binary code into decimal. The outputs of the register bits 2 multipliers are connected to the inputs of the first group of the partial product formation unit 5, the outputs of the register 1 registers of the multiplicand are connected to the inputs of the multiplication unit 4 of the multiplicand, the outputs of the first to the fourth groups of which are connected to the inputs of the groups from the second to the fifth, respectively 5 forming partial products, the outputs 16, 16 of two groups of each of the m groups of outputs 16 -16 of which are connected to the inputs of the binary summing unit 7 in accordance with the values of the weights of the bits, and the outputs 16, 16. The two senior subgroups of each of the m groups of outputs 16 - i 6 are connected to the inputs of the combining unit 6, the outputs 17-17 of which are connected to the inputs of the binary summing unit 7 in accordance with the values of the weights of the bits, outputs 18 —ISjj. tetrad transfers of block 7 binary summing are connected in accordance with the values of the weights of the bits to the inputs of the corresponding nodes 1 Ij -1 l "(summation of the tetrad transfers, whose outputs are connected to the inputs of the corresponding nodes 12, -122., multiplied by six, the outputs of which are connected to the first inputs knots

13, -13,., 1 summation, outputs 19 19, 1 tetrads from the first to the penultimate block 7 of the binary summation are connected in accordance with the values of the weights of bits to the second inputs of the corresponding nodes 13, -13 ,, summation, the outputs of which are connected to the inputs of the corresponding converters 14--14 ,, binary ko / tr - I

yes in ten, the outputs of which are connected to the inputs of the bits of the block 10 decimal summation in accordance with the values of the weights of the bits, output 19 "of the last tetrad of block 7

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binary cue1-1mming is connected to the high bit input of block 10 decimal summation, the outputs of which are connected to inputs of the product register 3, the outputs of decimal transfers of nodes 11 of tetrad transfer carry are connected to inputs of transfers of subsequent nodes 11 of tetrad transfer transfers. Block 6 contains groups of elements OR 20.

Registers 1 and 2 are designed to store t-bit decimal multipliers, while register 3 of the record records a 2t-bit decimal product.

Block 4 is designed to form double, four-fold and eight-fold multiplicands and can be implemented, as in the known device, on three serially connected doubling nodes. A single multiplier is supplied to the outputs 15 of the first group of block 4 directly from the outputs of the register 1 of the multiplier at outputs 15 of the second group of block 4, a double multiplier is formed, at the outputs 15d of the third group - a four-fold multiplicand and at the outputs of the fourth group - an eight-fold multiplicative.

Claims (1)

Block 5 is intended for the formation of partial products and contains 4 tons of groups of two-input elements I. At the outputs of elements And of one group, one partial product is formed, and in total, in block 5, 4in partial products are formed. This is due to the fact that four partial multiplications of each decimal digit of the H-bit multiplier are formed in the device. These four partial products form one group of outputs 16, 165, 16 and 16g of block 5 (Hi $ m), and the outputs 16 of the first subgroup of the i-th group are given a partial product of the multiplicand pa of binary distribution with a weight of 2 1 i- th tetrads multiplier. 16 of the second subgroup of the ith group, a partial multiplication of the multiplier by the value of a binary bit with a weight of 2 2D D multiples of the multiplier arrives; partial outputs of the multiplicand of the values of binary bits are applied to the outputs 16 and 16 of the third and fourth subgroup of the i-group with 2 H weights, respectively, 2 4 and 2 8 tetrads multiplier. Block 6 is intended for combining partial products that are fed to outputs 16, 16g of the third and fourth subgroups of the i-th group of outputs 16 of block 5, into one partial product arriving at output 17 of block 6. Such a combination is possible using code 8421 Outputs 16 and 16 of block 5 cannot simultaneously form two significant partial products (one of these partial products would be zero when the other takes a certain value other than zero). FIG. 2 shows a functional diagram of the unit 6 of the union for the case when the number of tetrads of multiplicative and multiplier bits is two (m 2). Block 6 contains two groups of elements of the LM 20. Block 7 of binary summation is intended for parallel summation of 3 tons of decimal partial works, formed with the help of blocks 5,. . and 6 and arriving at the inputs of block 7 in accordance with the values of the weights of their bits. At the outputs of block 7, 2t tetrads of the binary sum are formed in a single-digit code, and at the output. dy 18 -18, from block 7 5 inn-1 tetrad transfers arrive. For example, only those transfers that are formed in the first least significant tetrad of block 7 with the binary summation of decimal partial products in it are supplied to output 18 and which must come and go to its neighboring older tetrad to correctly form the binary sum on its inputs. 19, -19 ,. The transfers that occur in and are used in the first block of block 7, at its output 18, should not be fed. The tetrad shifts, the values of which arrive at the outputs 18 185 of block 7, can be either one-time double binary numbers or shopper numbers (two-digit, three-digit, or four-bit binary numbers). The latter takes place, for example, when binary summation of multi-input parallel counters is used in block 7 in order to increase its speed. Block 8 sums1-1iroBan tetrad transfers contains nodes 11, -11,., Summation, every1) of which carries out a binary summation of tetrad transfers, formed only in one tetrad of block 7. For example, node 11t produces only those tetrad transfers, which The images are in the mth tetrad of the binary summing unit 7 and are necessarily transmitted to its (m + 1) th tetrad. In order to reduce the values of binary sums generated at the outputs of nodes 1 1, -11. The block 8 summation of tetrad transfers when multiplying in the device of large-scale numbers, the nodes 11 -11 summation of the tetrad transfers are connected by a chain of decimal transfer. This makes it possible to significantly simplify the correction unit 9 and the unit 10 for decimal summation. In order to ensure high speed of operation of block 8, the values of decimal transfers of nodes 1, 1, - 2 should depend only on the values of the sum of the tetrad transfers transferred to their inputs from the equilibrium outputs 18, block 7 and not depend on the values of their input transfers. This means that the decimal transfer formed at the transfer output of the j-ro node 11 (1 j S 2 т - 2) enters the transfer input of the (j + I) -ro node P and is localized in it, i.e. this transfer cannot cause a decimal transfer signal from (j + l) -ro of node 11, which in turn could cause a transfer signal from (j + 2) -ro of node 11, etc. The formation of decimal transfers in block 8 can be organized differently, in particular, it can be the following: if the number of one-digit tetrad transfers 10 # N520 enters the input of the j-ro of node II from the output I8J of block 7 transfer, equal to unity; ecjiH 20 5N J 30, then formed liepeHoCj, framed two, etc. It goes without saying that in this case the binary sums of nodes P, 11, „,., Block 8 must be adjusted in a certain way. With such an organization of decimal transfers in block 8, the summation of tetrad transfers for values of m 16 at the outputs of nodes 11 -ll, j ,, the binary 11 1e sums1.1 cannot be formed, the values of which exceed eleven (1011), the Correction Unit 9 contains nodes,, binary multiplication by six, nodes 13, -13 ,, binary summation and converters 1, lA ,,,, binary code in decimal. According to the values of the sum of tetrad transfers obtained at the outputs of nodes 11-11 "1 block 8, in block 9 with j / g | With the help of nodes 12, -12 I and six-by-six, corrections are formed for the result formed at the outputs 19, -19, the tetrad of the binary block 7, the summation. Such a principle of forming a correction is explained by the fact that, when FIBLE summing up in block 7 decimal partial products, to obtain the correct final result, it is necessary, whenever a one-bit transfer from a tirade occurs, to correct this tetrad by adding the number 6 to it. increase in speed and reduce the amount of equipment this addition of the number 6 in block 7 does not produce binary summation with. Instead, in block 8, the NIN of tetrad transfers for each weight position of block 7 counts the number of tetrad transfers, from the value of which, in the corresponding node 12 multiplied by six blocks 9, the correct correction is formed. In block 9, with the help of nodes 13 13,, an equilibrium binary summation of the correction values formed at the outputs of the nodes is carried out. y by six to the values of the corresponding tetrads of the block 7 5 formed at its outputs 19, -19 ,,. Formed at the outputs of nodes 13, the binary sums are converted at the corresponding nodes into decimal. It is assumed that the outputs of the nodes 11 -P ,, 1 of block 8 cannot form a binary sum of tetrad transfers, greater than 1110 (this can be achieved in almost all cjty4, -iHx by a corresponding construction of the circuit -capital transfer of block 8 ), then a binary product greater than 1110x110 1010100 cannot be formed at the outputs of nodes. Therefore, a binary amount exceeding the value 1010100 + +1111 1100011 cannot be generated at the outputs of nodes, and therefore at the outputs of nodes 14. -i converting binary to decimal is not possible A decimal result is generated, the maximum value of which exceeds 99. Thus, the correct decimal product of the original factors is formed at the outputs of the correction block 9, but only in a two-row code (as two numbers). The set of nodes 12-14 of a single bit of correction block 9 can be implemented according to a lean truth table in the form of a low-capacity low-speed ROM of small capacity, for example, on commercially available ROMs with a capacity of 256 x 8 bits. As a unit of 10 decimal summation, as in the known device, a fast two-input decimal adder can be used that converts the two-row code of the ten-product to one-way. The device works as follows. At the same time or sequentially in time, t-bit decimal factors are loaded into registers 1 and 2, respectively, of the multiplicand and multiplier. After loading the multiplicand into register 1 in block 4 multiples of multiplicand are formed, which from its outputs go to the corresponding groups of inputs of block 5, in which 4t parts in the decimal code are formed, from 2t partial works directly go to the inputs of block 7 binary summation in accordance The values of the weights of the bits from the outputs 16, le of block 5. (lsiiLm), and the other 2m partial products from outputs 16, 16 of block 5 are pre-fed to block 6, in which they are combined into m partial works and which The outputs are also fed to the inputs of the binary summation unit 7 in accordance with the values of the weights of the bits. In block 7, the 3t decimal partial products are quickly summed as binary numbers and, if possible, in parallel, the sum of tetrad transfers formed in outputs 18, -18, block 17 of the binary summation, which later on in block 9 corrects the result generated at the outputs of the tetrads of block 7. Formed in a two-wire code at the outputs of block 9, the decimal product will multiply leu converted at block 10 to summing a decimal code odnor-stand, which 3apisy vaets into register 3 works. The invention The device of the day multiplication, containing the registers of multiplicable, multiplier and product, the multiplier multiplication unit, the unit of formation of partial products, the block of binary summation, the block of tetrad transfers, the correction block and the block of decimal summation, and the block of tetrad transfers, tetra summation nodes, the correction block contains nodes multiplied by six, summation nodes, and binary-to-binary converters, while the outputs of the digits are The multiplier countries are connected to the inputs of the first group of the partial product formation block, the outputs of the register multiplicative register are connected to the inputs of the multiplicative multiplier unit, the outputs of the first to fourth groups of which are connected to the inputs of the second and fifth groups of the partial products The outputs of two lower subgroups of each of the m groups of outputs of which (ha is the number of tetrads of multiplicand and multiplier) are connected to the inputs of the binary summation unit in accordance with the weights bins, the outputs of the tetrad transfers of the binary Summation block are connected in accordance with the values of the weights of the bits to the inputs of the corresponding summation nodes of the tetrad transfers, whose outputs are connected to the inputs of the corresponding nodes multiplied by six, the outputs of which are connected to the first inputs of the corresponding summation nodes, the output of the last tetrad the binary sum block is connected to the high bit input of the ten sum block, the outputs of which are connected to the inputs of the product register, the outputs of ten Total transfers of summation nodes of tetrad transfers are connected to the carry inputs of subsequent summation nodes of tetrad transfers, characterized in that, in order to reduce the number of equipment, it contains a merge unit consisting of m groups of OR elements, the multiplication nodes by six and the summation nodes are made binary, moreover, the outputs of the two senior subgroups of each of the m groups of the outputs of the block of formation of partial penetrations are connected to the inputs of the corresponding group of elements OR, the outputs of which are connected to the inputs b Binary summation in accordance with the values of the weights of the bits, the outputs of the tetrads from the first to the last binary block of the world are connected in accordance with the values of the weights of the bits to the second inputs of the corresponding summation nodes, the outputs of which are connected to the inputs of the corresponding binary code converters in the dec The outputs of which are connected to the inputs of the bits of the block of the decimal summation in accordance with the values of the weights of the bits.