SU1256128A1 - Tuneable audio signal generator - Google Patents

Abstract

The invention relates to a pulse technique and can be used, for example, in computing devices. The purpose of the invention is to increase the stability and accuracy of the generator. The generator contains integrator 1, comparators 2 and 3, RS-triggers 4 and controlled keys 5 and 6, Introduction of prohibition elements 9 and 10 and execution of RS-trigger 4 synchronized increase the frequency stability of the generated voltage and accuracy. its installation, 2 Il.d figure 1

Description

The invention relates to a pulse technique and can be used, for example, in computing devices.

The purpose of the invention is to increase the stability and accuracy of the device by increasing the stability of the frequency of the generated voltage and the accuracy of its installation. ,

FIG. 1 shows the structural electrical circuit of the device; in fig. 2 - diagrams for the operation of the device.

Tunable low frequency generator contains integrator 1, the output of which is connected to the input of the first and second Comparators 2 and 3, the output of the first of which is connected to the reset input of the RS trigger 4, and the output of the second to the installation RS of the trigger, the input of the integrator is connected to the outputs the first and second controlled keys 5 and 6, whose inputs are connected respectively to the first and

the comparator 2 input. Upon reaching the output voltage level (the comparator 2 is activated (Fig. 2e) and the output of the prohibition element 9 is at a level of zero (Fig. 2c), prohibiting the passage of the control voltage from the bus 7 to the input integrator 1. Therefore, further, before the arrival of the next sync pulse (t 1),

fO when trigger 4 reverses its state (Fig. 2b), the voltage at the output of integrator 1 remains constant. After transferring the R5 trigger 4 (Fig. 2d) to the straight line

15 the input of the prohibition element 10 is supplied with a single voltage level and the control voltage from the bus 8 (opposite to the voltage of the bus 7) is fed to the input

20 of integrator 1, as a result of which its output voltage begins to decrease. Upon reaching the output voltage of the integrator 1 level - UQ ,, supplied via bus 1 3 to the input

the second tires 7 and 8 of the multipolar 5 comparator 3, the last voltage source, the first and second prohibition elements 9 and 10, the RS trigger is synchronized, the clock input of which is connected to the bus 11, the forward output is connected to the direct input of the first element 9 the prohibition, the inverse input of which is connected to the reset input of the R5 trigger 4, and the output to the control input of the first control key 5, inver

The RS output of the trigger 4 is connected to the direct input of the second prohibition element 10, the inverse input of which is connected to the installation input of the RS trigger 4, and the output to the control input of the second control key 6.

The device works as follows.

A sequence of sync pulses is sent to the clock input of trigger 4 (Fig. 2a). period tc. (which are 2 n times smaller than the period of the generated oscillations (for Fig. 2 h 8). Suppose at the moment of time the trigger

4 is in single state

Q 1 (Fig. 25). Voltage at the control input of the control key

5 (Fig. 2c) corresponds to a single level until the increasing voltage at the output of the integrator 1 (Fig. 2e) reaches the level of the positive reference voltage supplied by mine 12 to W

the comparator 2 input. Upon reaching the output voltage level (the comparator 2 is triggered (Fig. 2e) and the output of the prohibition element 9 appears level zero (Fig. 2c), prohibiting the passage of the control voltage from the bus 7 to the integrator input 1. Therefore, further, prior to the arrival of the next sync pulse (t 1),

when trigger 4 changes its state to the opposite (Fig. 2b), the voltage at the output of integrator 1 remains constant. After transferring the R5 trigger 4 (Fig. 2d) to the straight line

the input of the prohibition element 10 is supplied with a single voltage level and the control voltage from the bus 8 (opposite to the polarity of the voltage on the bus 7) is fed to the input

integrator 1, with the result that its output voltage begins to decrease. Upon reaching the output voltage of the integrator 1 level - UQ ,, supplied via bus 1 3 to the input

em (fig. 2g) (i-i) and the voltage change on integrator 1 stops. The arrival of the next sync pulse () causes the flip-flop of trigger 4 and the process of reloading the integrator and switching the switching nodes continues in the order described. The length of time intervals, as well

when the output voltage of the integrator is constant, in all cases x is less than the period of clock pulses. The minimum value of this interval should be chosen less than the time of instability of the frequency of entering the elements for a half-period of the generated oscillations. The scale of possible values of the generated frequencies corresponds to a series of values of icn. At a constant frequency of following sync pulses, this scale is discrete. By combining a choice of a certain value n with the value of the reference voltage iUg and the period of the following clock pulses, it is possible to set any value of the generated frequency. In the device, the frequency setting is reduced to the selection of a control voltage that provides the specified value and. The division factor I is set by the choice of the control voltage in a certain range of values that provide the rate of change of the output voltage.

31

integrator within the limits of the dotted line in FIG. 2d Due to this, the requirement for the accuracy of the control voltage selection is reduced by (h -1) times, and vice versa, all other conditions being equal, the accuracy of setting the control voltage of the device provides (n -1) times the accuracy of the control voltage setting.

Claims (1)

Invention Formula A tunable low-frequency generator that contains an integrator, the output of which is connected to the input of the first and second comparators, the output of the first of which is connected to the reset input of the R5 flip-flop, and the output of the second - to the installation input of the RS-trigger, and the input of the integrator the second controlled keys, the inputs of which are connected respectively g IIIII 1 III and i III III M III 1 I II II 284 with the first and second tires of a different voltage source, characterized in that, in order to increase stability and accuracy of operation by increasing the stability of the frequency of the voltage being formed and the accuracy of its setting, the first and second elements of the prohibition are introduced into it, and - the trigger is synchronized, its clock input is connected to the clock signal bus, the direct output is connected to the direct input of the first prohibition element, the inverse input of which is connected to the reset input RS of the trigger, and the output is connected to the control input of the first control a key RS -triggera inverse output is connected to the direct input of the second barring member, inverted input is connected to the adjusting input -triggera R5, and output to the control input of the second controllable switch. Editor N. Margolin Compiled by A. Gorbachev Tehred I.Popovich Proofreader S. Cherni Order 4832/53 Circulation 816 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, st. Project, 4 FIG. 2