SU1249526A1 - Graphic visual display unit with checking - Google Patents

Abstract

This invention relates to automation and computing. The purpose of the invention is to increase the speed of control. The goal is achieved by the control test. The device consists of fragments, each of which is displayed on the screen depending on the state of the corresponding nodes of the device. By comparing the test image on the screen with the reference, the operator can judge the operability of the device and determine the node in which there is a fault. The control test automatically changes depending on the states of the individual nodes of the device. The test control program is written into the ROM, and the changing data is written and read from the registers whose addresses are indicative of being stored in the additional ROM. The reference image is displayed and modified, i.e. one image is replaced by another if the working image is not displayed on the screen. In addition, the operator can at any time interrupt the formation of the working image without disturbing it, and see the control image on the screen. Access to program fragments written in ROM can also be performed from a work program using a single command, which increases the possibilities of internal program control. This results in a compact and reliable device control system with a sufficient depth of checking, and the results of display control in different modes automatically and promptly presented to the operator. The display consists of an image processor, a status register, a group of screen consoles, receiver amplifiers and transmitters, a buffer register block, and a pulse distributor. In order to achieve the above effect, a frammeet ROM, a feature ROM, a control information output control unit, a group of registers and a group of counters are entered into it. 5 il. i (L 4: SO SL IND JV

Description

The invention relates to automation and computing technology, in particular, to devices for displaying graphical information (graphic displays).

Graphic displays provide on-screen display of graphic information (drawings, diagrams, graphs, etc.), as well as textual (alphanumeric) information. At the same time, both textual and graphical information can be edited and supplemented by the graphic display operator using input devices included in the display.

The display, entry and editing of information in the graphic display is carried out under the control of an internal program, which is generated in the computer and is recorded in the display memory. The internal program can be compiled manually and entered into the display memory. Such a program can be entered, for example, with a punched tape, using a photo reader.

The composition of the commands of the graphic script includes commands that set the display mode and operating modes of the light

pen, arithmetic commands, transition commands, commands for exchanging between the registers of wizards and control commands

Programs from these commands, generated in a computer and recorded in a memory, allow you to receive various static and dynamic images on the screen, enter alphanumeric and graphic information into the computer, convert the information, and edit the image displayed on the screen.

The performance monitoring of graphic displays is carried out by hardware and by means of software tests.

Software tests are of two types: stand-alone, entered into the memory of the diploma from the carrier, for example, perfolene

you, offline; machine, loaded from computing machines and controlled by it.

The aim of the invention is to increase the speed of control,

The essence of the invention is that the state of the display is determined and, if the operating information is not displayed in this on-screen console (there is no signal to turn on

regeneration trigger), then test programs are automatically generated, with the help of which fragments of control images are displayed on the screen. Moreover, the analysis of the operating mode is performed by alternately connecting for all the screen consoles to the control unit.

The display of each on-screen console (EA) displays a set of fragments, the number and type of which vary depending on the state of the display. From the reference image on the screen, the operability of the display or the nature of the fault is determined.

In this case, when deviations from normal operation occur, the state of the display changes and automatic switching of test fragments is performed for more detailed testing in this mode of operation.

The diagnostic program is turned on automatically or by a corresponding switch on the keyboard that is part of the EPU input devices (the function key is used as the switch

five

atura).

The formation of the working image on the screen is then suspended, but the work program in the memory device is not lost and is not distorted. Disconnection from the system (from the computer and the program) in this case is neither physically nor logically performed, but the issuance of interruptions in. The computer is blocked.

In addition, since the control image appears on the screen automatically immediately after switching on the device, the possibility of stopping the CRT beam at points that correspond to the extreme currents in the deflection amplifiers is eliminated, and the fault is quickly localized. Saving time is also obtained by eliminating switching to control individual

modes and test input.

FIG. 1 shows a block diagram of the device; in fig. 2 is a diagram of the control unit and pulse distributor in FIG. 3 - scheme

the state register of the console, the group counters and the control information issuance control unit} in FIG. 4 - time diagram of the device operation

WA in FIG. 5 is an example of a test fragment algorithm.

The display contains an image processing processor 1, a block of 2 amplifiers-receivers (UPM), register 3: no console, control block 4, command register 5, read-only memory (ROM) 6 microcommands, switch 7 of the bus 8, adder, counter 9 addresses , block 10 of registers, memory 11 (memory), block 12 of buffer registers, block 13 of amplifiers-transmitters (DRC), screen consoles 14.1-14. groups (EP), distributor 15 pulses, ROM 16 fragments, ROM 17 signs, block 18 registers of variable information, registers 19.1- .19.h groups, counters 20.1-20.h groups, block 21 of control of control information, St. h 22 with a computer channel.

Control block 4 contains blocks 23.1-23. flip-flops, electronic control, AND 24, shift register 25, trigger .26 memory cycles, elements 27 and 28, clock generator 29, And elements 30-38, regeneration trigger 39, electronic readiness trigger 40, data transfer trigger 41 EP

The distributor 15 contains the counter 42, the decoder 43. Register 19 contains the counter 44 frames, register 45, the encoder 46.

The counter 20 contains the local shaper 47, the element OR 48, the element And 49, the counter 50.

The control information control unit 21 contains the AND group 51, the element OR 52, the ROM 53 of the addressJ element NOT 54, the element OR 55, the AND-NE element 56, the trigger 57, the elements AND 58-60, the decoder 61..

The designations of the circuits shown in the diagrams: 61 - readiness of the ES, 62 - resolution of the transfer to the ES, 63 - sync pulses, 64 - commands Start of frame (NC) and Unconditional transition (BP) 65 - number of the screen console, 66 - sign of variable information, 67 - address of the beginning of the fragment, 68 - sign of operation of ROM 17, 69 - sign of operation of block 18, 70 - sign of operation of ROM 16, 71 - signals from group 19.1-19.h register outputs, 72 - signals from group meter outputs, 73 - signal fragment skip, 74 - signal for

2495264

Preta operation of the charger 11, 75 — signals of the on-screen console status, 76 — regeneration indication, informational 77 and address 78 busses of processor 1. 5 A distinctive feature of connecting a graphic display to a computer is the presence of such channel commands as commands to enable and disable regeneration, input pointer 10 (cursor). These commands, as well as

the signals that determine the device operation time with the channel (RAB-A), and the signals for switching on the memory operation cycle when writing and reading information from channel 5 go through the status register 3 and then to control unit 4.

The display works as follows.

In the working mode, a working image is displayed on the screen, which the operator can change with the help of devices, input and engage in dialogue with the computer.

In the monitoring mode, automatic diagnostics of the main

nodes with the display of diagnostic results on the screen of the indicator. Depending on the type of malfunction, various images appear on the screen, which can be used to quickly and easily determine the status and performance of individual units of the device by comparing them with a standard. . Ability to form on the screen. The graphic image provides the diagnostics accuracy for the user who does not have special training. Ensuring fully automatic fault localization without human fate

0 leads to unacceptably high costs of computer time and equipment.

The programs of separate fragments provide, for example, checking the passage through 1 of the communication link of the discharge 5 of the data from the control device to the on-screen console and vice versa, inputting character information from the keyboard; input graphic information from the light pen; signal passing

6 readiness of the on-screen console for correct operation of the adder, the state of individual triggers, the execution of various display modes, etc. The control is simultaneously carried out.

operation of the functional units of the on-screen console and the indicator.

The reference picture programs are recorded in a persistent storage device (ROM). In order to change the image on the screen, you need to change the number of displayed fragments.

When the state of the display changes, the sequence and the number of fragments transmitted to the EA will change. In different fragments, graphic modes and control modes are combined in different ways, with the help of which the operation of the device blocks is checked. If a violation of any mode is detected, the code in the status register is changed and switching to the output of fragments in which this mode is absent is performed.

If the availability of signals of readiness from the EA is stopped, the corresponding fragment of the image is turned on, which is transmitted to the EA with the maximum possible intervals between the transmission of information to the EA, which makes it possible to display this fragment without readiness signals.

In this case, it is possible to autonomously (without the fate of the computer) change the sequence of test checks depending on the state (operability) of individual units of the device.

The information in the electronic transducer is transmitted by quanta (data blocks), each of which ensures the formation of an image element (a vector or symbol point) on the CRT screen. After the next quantum is transmitted (Fig. 4) by the signal from control unit 4, the sample from memory 11 is allowed into block 12 of the next information quantum. The memory enable signal from control unit 4 also enters via circuit 63 to control information output control unit 21, where, based on the device status signals coming through circuits 75 and 76, the presence of operating information on the screen and the activation of the corresponding key is analyzed the functional keyboard of the on-screen console 14. If this key is pressed or there is no working image, the signal on the circuit 74 prohibits the issuance of the signal of the memory 11 from the control unit 4, and in the control block 21 the signals are generated allowing e selection information from the ROM 17 (circuit 68), a ROM frag

cops 16 (chain 7U) or block 18 (chain 69).

Access to memory 11 is made either to form an image on the screen and record data from the input devices of the screen console 14, or to record and read information during data exchange with a computer. In the latter case, the start of the sequence of control signals of the charger 11 is performed by the signal.

During the memory cycle of the control unit 4, the sync pulses are issued, from which the next memory address is output from the register unit 10 to the address bar 78, the information is written or read to the digital bus 47, the address is increased by 1 in the counter 9, and the changed address is written to the corresponding register register block 10.

Since the display includes several screen consoles 14, operating independently of each other, the equipment is divided into the total for all

EP 14 and individual for each console.

Individual for each screen console are the block of amplifier-receivers 2 and the block of 13 amplifiers-transmitters, the number of which, in each block corresponds to the number of EP 14.

The individual equipment is connected to the common equipment alternately, at the moments of time determined by signals 65 from the output of the distributor 15. Switching signals from the distributor 15 is done after preparing to transfer the next quantum of information, i.e. storing information for it in block 12 buffer registers.

Information in EP 14 can be transmitted not only from the storage device 11, but also from the ROM of fragments 16, the address and numeric inputs and outputs of which are connected in parallel to the corresponding inputs and outputs of the memory 11.

The ROM of fragments 16 stores fragments of the control test. The data format in ROM 16 is similar to the data format in memory 11, however, due to the fact that some of the test data (the coordinates of the moving point, jump addresses, cycle constants, etc.) are variable, and in the ROM data cannot be changed Then the variable data is stored in block 18 of registers. A sign that the word is in this address of the test program. It is variable, and the register address in register block 18, from where this word is read or written to, is stored in ROM 17. On the ROM of fragments 16 and ROM

17 the same addresses are supplied from address bus 78. If the bit of the variable information flag read from ROM 17 is 1, then the corresponding trigger 57 in the block is turned on.

21 controls If this trigger is turned on, access to ROM 16 (no signal 70) is prohibited and access (sampling or recording of information from the word line 73) to the block is allowed

18 registers (there is a signal 69) .- The information received on the numeric bus 77 from the ROM 16 and block 18 is transmitted to the EP 14 through the blocks 12 and 13 or is processed in accordance with the commands received in the register

5 commands, similar to the information read from memory 11 in the display mode of the working image.

Commands entered into the command register 5 from the memory determine the operation mode of the display and such functions as, for example, addition, writing constants, transitions, etc. These functions are implemented according to the firmware recorded in ROM 6.

The number of fragments displayed on the screen and creating a control image depends on the state of the display fixed in register 19.

Number of bits in the register

19 corresponds to the number of fragments. The information in register 19 is written from the state register 3.

P and from block 4 of the control indicates the operability of the individual display nodes.

If the fragment number in the ROM 16 matches the bit number of the register 19, in which 1 is recorded, this pattern is displayed on the screen. The role in register resolution 19 leads to the dispatch of the code of its fragment.

The number of the displayed fragment for each screen console is defined. is made by a counter 20. In the counter 20 5, the counting of fragments is kept, starting from the command Start frame overwriting. , The counting input of the counter receives a signal when the transition command appears. These commands are recorded in the ROM 10 of the fragments 16 and are received through the register of commands 5 through the chain 64.

When the signals at the outputs of the register 19 and the fragment counter 20 coincide, in the control information block 21, the start address of the fragment and the signals allowing the output of the control image in EP 14 are generated.

FIG. 2 is a block diagram of the 4 4 control. The composition of this block includes both individual equipment for each EP 14 (trigger block 23) and equipment common to all consoles. The individual 25-equipment includes triggers, determining the mode of regeneration (repetition) of the image on the console screen (trigger 39) state of readiness of the electronic signature to receive new information (trigger 40), mode of information transfer in the electronic signature (trigger 41) .

The process of forming the working image on the screen of the console 14 is determined by the regeneration trigger 39. 5 When this trigger is activated, the regeneration (re-shaping) of the image on the screen takes place according to the data recorded in the device memory 11. The trigger 39 for regeneration is turned on and off by commands from the digital computer via register 3.

The flip-flops 39-41 are connected to the equipment as a whole by signals from the distributor 15. 5 After the next quantum of information has been prepared for the EP 14 and recorded in the buffer registers 12, the transfer trigger 41 is turned on and through the elements 37 and 28 the signal is fed to the input of the counter 42 This signal is clocked (on element 28) by a sync pulse from the generator output 29 sync pulses. .

The signals from the output of counter 42 are decoded by the decoder 43 and enable operation of the equipment serving the next ES. If the transfer is not complete for the selected ES

information (trigger 41 is enabled), then. in the distributor 15, a transition is made to the sampling of a signal enabling service of the next EP order. At the same time, elements 38 and 24 pass a signal that triggers the shift register 25. This register forms a sequence of signals along which the trigger 26 of the memory cycle is enabled and the next quantum of information is selected from the memory.

When communicating with a computer channel, the shift register 25 is triggered by signals from the channel, and the signal passing through the element 24 is disabled by the inverse signal RAB-A (operation of the subscriber with the channel), which is also formed in the channel.

If a working image is not formed on the screen of the EP 14, then the formation of the reference image is allowed, the issue of which occurs under the control of the block 21 (Fig. 3).

If there is no regeneration of the working image (the regeneration trigger is turned off and the signal 76 passes through the HE element 54) or the corresponding key of the function key is included in the EP 14 input devices (the signal from the EP 14 passes through block 2 and is stored in register 3, from where the circuit 75 enters the block 21), a signal appears at the output of the element OR 55 (Fig. 3). During the memory cycle, when there is no channel operation (no RAB-A signal), the ROM 16 and 17 and the block 18 are enabled. At that, a signal 74 appears at the output of the AND-HE element 56, which prohibits the memory 11, and signals are generated 68, as well as one of the signals 69 and 70. The last signals depend on the operation of the flip-flop 57, which is turned on if the variable information sign 66 comes from the ROM 17.

The device status information before being written in register 45 is encoded by encoder 46, which allows changing the number of displayed fragments and the display sequence of these fragments as each state changes. In this way, the test image can be dynamically changed according to the dynamics

checks and with the dynamics of the passage of signals and the implementation of modes. If any of the modes of operation are incorrectly executed using the encoder 46, a code can be written into the register 45, in accordance with which fragments will be displayed, which will check other modes to clarify the location of the fault.

Counter 44 determines the time after which the information in register 45 changes. Signal 44 is signaled to the input when the Start frame overwrite command appears in command register 5 (circuit 64). This signal appears mainly at a frequency of 50 Hz. Therefore, when the number of bits in the counter 44 is equal to P (for example,), the information in the register 45 is changed through - with,

which allows to consider the change of the image on the screen during a single failure in the state of the equipment.

The counting of fragments starts with the command Start of frame overwriting, which sets the counter 46 to the initial state. The counting input of counter 46 receives a signal when a Transition command appears in command register 5, which determines the beginning of the fragment. The code from the output of the counter 46 via the bus driver 47 is combined with the outputs of the counters 20 by a fragment of other EP 14 (circuit 72).

Since a register having an output with three stable states can be used as a register 45, the outputs of all registers

19 states can also be combined (circuit 71). Counter Outputs

20 fragments, gated signals 65 from the output of the distributor 15, are fed to the inputs of the decoder 50 and the address ROM 53 in the control information output control unit 21.

From the output of the decoder 61, the signals are fed to the first inputs of the corresponding And elements 51, to the second inputs of which signals are output from the outputs of the state registers 19. The outputs of the registers of the 19 states of each EA are also separated in time by signals along circuit 65.

The signal at the output of the corresponding element AND in the group of elements AND 51 appears when this element, activated at the first input, arrives at the input from the output of the decoder 61, a signal formed by the presence of a zero in the corresponding register bit 45. The outputs of the elements 51 are combined in the element OR 52. The signal from the output of the element OR 52 bans the operation of the ROM 53 and is fed to the inputs of the counters of 20 fragments, where, having passed through the element OR 48 and the element AND 49 (passes only during the operation of this EA), increases the code in the counter 46 per unit. The code of the fragment number from the output of the counter of 20 fragments comes to the input of the ROM of addresses 53. If not the signal is stored in the ROM from the output of the element OR 52, the output of the ROM 53 forms the code of the address of the beginning of this fragment, which is fed to the address bus on the circuit 67. This code is written into the register of the address of this EA in block 10 of registers as it is determined by signals from block 4 of the control on the Transition command.

After that, the fragment program is executed until the next Transition command appears.

Access to the fragments of the program recorded in the ROM can also be made from the work program using the Go to program command. By specifying the start address of a fragment with this command, you can activate a software module that provides dynamic control of a separate display node, or perform such a function as, for example, entering graphic information from a tablet with simultaneous display of the entered information on the screen.

When generating a graphic reference image, it is easy to provide simultaneous display of information about the health of a large number of elements of the device, since the graphic information is more informative than textual information.

An example of testing a single node, for example, a communication line.

To verify the communication line, the following algorithm is performed:

a) to the on-screen console from the ROM, reprogramming the display of points and initial (zero) coordinates;

b) the coordinates of the CRT beam are read from the on-screen console to the charger

c) the read coordinates of the point along the axes X and Y are increased by 1 and prepared for transfer to the on-screen console

d) an unconditional jump to the beginning is performed.

When working properly, a line consisting of points, without kinks, is displayed on the screen along the di Agonali.

Claims (1)

Invention Formula A graphic display with control containing a group of screen consoles, the inputs of which are connected to the outputs of the amplifier / transmitter unit; information inputs of which are connected to a group of outputs of the block of buffer registers, the information inputs of which are connected to the output information bus of the image processor, and the outputs of the screen consoles of the group amplifiers-receivers, the outputs of which are connected to the information inputs of the status register of the console, the output of which is connected to the mode input The image processor of the image processor, the control input / output of the image processor, and the second information input of the console status register are connected to the input-output channel of the computer, the sync output of the image processing processor is connected to the input of the pulse distributor, whose outputs are connected to the control inputs of the amplifiers-pedals tweeters and receiver amplifiers, and with the inputs of the resolution of the regeneration of the image processing processor, that is, in order to increase the control efficiency, variable information registers, permanent storage device (ROM) of fragments, feature ROM, control information output control block, register group and counter group, the control information issuance control block contains trigger, decoder, group of elements And, three elements And, two elements OR, elements NOT and NAND and address ROM whose inputs and inputs of the decoder are connected to the outputs of the group of counters, outputs of the address ROM are connected to the address bus of the image processor, the outputs of the connection decoder They are not connected to the first inputs of the AND elements of the group, the second inputs and outputs of which are connected respectively to the outputs of the group status registers and the inputs of the first OR element whose output is connected to the counting inputs of the group counters, the output of the registration sign of the image processor is NOT connected to the first input of the second the OR element, the output of which is connected to the first inputs of the NAND element and the first AND element, the second inputs of which, the second input of the second element OR and. information inputs of the group status registers are connected to the output of the status register of the console, the first and second outputs of the trigger are connected to the first inputs of the second and third elements AND, the second inputs of which are connected to the output of the first element And connected to the permitting input of the ROM of features of the second and third elements AND are connected respectively with the enabling inputs of the variable information register block and the fragment ROM, the output of the NAND element with the lock input of the image processor, the sync output of which o is connected to the third input of the first element AND and the synchronous input of the trigger, the information the input of which is connected to the output of the characteristic of the feature ROM, whose address input and the address input of the fragment ROM are connected to the address bus of the image processor, whose information bus is connected to the output of the fragment ROM and the input / output of the variable information registers block the input of the variable information register block, the output of the image processor image mapping bit is connected to the enabling input of the buffer register block, the readiness output the image processor is connected to the sync inputs of the status registers of the group, the installation inputs of which and the installation inputs of the group counters are connected to the output of the command Changing the information of the image processing processor, and their resolving outputs of the pulse distributor, b juna sham 1 in memory II FIG. 2 RAB-N SC s computer  Re & EF.O Res: ES L1 Sisi Work for ES T2 before. EPO Tz before ZP ( 1-1 Address on Sha 1-1 Nnf on the go will add. ROM to pnip Nn Slave. reg. AC inf. g TG I I I I i-f Pad ROM (ragmentov Selection of a point with coordinates XY recorded by S of memory at address A Moving the XS / mov / ifu coordinates to oe / juvuHij lH, lu. Read coordinates / jyva 3/7 G  Fragment l there is  Sh13nak fn-f b register hundred nor Fragment Esto   state register Chet Miznak p d register one hundred E Compiled by I.Khazov Editor S.Patrusheva Tehred O.Gortvay ProofreaderL.Pilipenko Order 4326/50 Circulation 671 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab. 4/3 Production and printing company, Uzhgorod, st. Project, 4 oor memory din lh Not. Not Not