SU1248073A1 - Number-to-time interval converter - Google Patents

Abstract

The invention relates to measuring information technology and can be used in measurements, signal transmission and information processing. The purpose of the invention is to improve the accuracy by reducing the delay time of forming a fall in the time interval. In counter 8, through the recording valves 7, the code inverse to the converted code is stored, which is stored in register 6. By the start signal of the conversion, coming through the input bus 10, a signal appears at the output of the time interval triggering 5 that allows one of the phases of the multiphase to pass generator 1 through element 4 and to the counting input of the counter 8. In this case, the state of the current phase of the multiphase generator 1 is entered into the D-flip-flops 2 and the front of the time interval is formed on the output bus 11. After zeroing of the counter 8 with the current phase code of the multiphase generator 1 being equal to the code recorded in the D-flip-flops 2, zero outputs appear on all outputs of bit 3 of the bit comparison, as a result of which the block 9 compares with the zero code, resetting the trigger 5 and thus forming on the output bus 11 a fall in the time interval. 1 il. i SL to 4 ;; oo o-ch1 so

Description

The invention relates to measuring information technology and can be used in measurements, signal transmission and information processing in control and modeling systems.

The aim of the invention is to improve the accuracy by reducing

the time delay of the formation of the decline of the time interval.

The drawing shows a structural electrical circuit of the converter, the converter contains a multi-phase generator of 1 pulses, C-triggers 2 fixing the current. phases, block 3, one by one code comparison, element 4 AND, trigger 5, formation of a time interval, register 6 of the code being converted, recording gates 7, pulse counter 8, block 9 comparing with a zero code (for example, on the OR-NOT element), input bus 10 and output bus 11.

The outputs of the multi-phase generator 1 are connected to the D-inputs of the corresponding D-flip-flops 2, the C-inputs of which are combined and are the output bus 11. The information inputs of the counter 8 through the valves 7 are connected to the corresponding first inputs of the block 9, the output of which is connected to the first input of the trigger 5 The second input of which is input bus 10 and the output is output bus 11. The first inputs of block 3 are connected to the outputs of the corresponding D-flip-flops 2, the second inputs to the corresponding outputs of the multi-phase generator 1, and the outputs to the corresponding second odes unit 9. The first input member 4 and is the output line, a second input connected to one of mnogofaznogo- generator 1 outputs, and an output - to the count input of the counter B.

Converter code - time interval works as follows.

In the initial state, D-triggers 2, register 6 and counter 8 are reset (there is no record of the code being converted).

The set of output signals of the generator 1 at each instant of time forms the current phase, which is fed to the D inputs of the D flip-flops 2. A register 6 records the converted code. At the same time, the counter inverse of the entry recorded in the register / 6 is entered into the counter 8 through the recording gates 7.

fO

2480732,

The start of conversion signal arriving at the converter bus 10, at the output of flip-flop 5, a logical 1 signal appears, through which the pulses of one phase of the generator 1 through element 4 are allowed to go And the counted C input of the counter 8 is entered into the state of the current phase the inputs of the generator 1 to the D-flip-flops 2 and on the output bus 11, the front of the resulting time interval is formed. Counter 8 counts the pulses of one of the phases of generator 1, arriving at its input through fJ cut element 4, until all its zeros occur at its output. This combination is maintained for the duration of one period of generator 1. During this time

2Q at the output of generator 1, the codes of all possible phases appear successively, and if one of them is equal to the code recorded at the moment of the start of the D-flip-flop 2,

25, on all outputs of block 3, logic O signals appear, as a result of which block 9 triggers. The output signal of block 9 converts trigger 5 to the zero state, while the pulses through element 4 are forbidden to the counter input B and output is generated recession of the received time interval.

Without taking into account the instability of the frequency of the generator 1, the true value of the duration of the formed time interval Tc is known and proposed by the converter m. Code - time, the interval will be equal to

thirty

35

45

40

t „nt„ - | ,,

v

where N is the converted code T „is the period of the generator 1; the number of phases of the generator C tj is the delay in the formation of the front and fall, respectively, of the resulting time interval.

Both in the known and in the proposed converters. Is determined by the time for triggering the trigger 55 to form a time interval. In the famous converter

50

H

   .

where t, t and t are the response times of the respective switching unit, the pulse counter and the comparison unit with the zero code.

%,,,

where t, and ty are the response times of the multiplexer, the EXCLUSIVE OR element, and the element I.

Finally for izmestnogo converter can be written

(one)

 - | | - “- tcr + h-ft.

The maximum value of the delay in the formation of the decay of the resulting time interval t in the proposed converter will be in the case when the moment of the start of the conversion occurs during the generator 1 phase, supplied to the counting input of the counter 8. In this case

t ,,, + t ,,,.

 + t.-f-t ,,. (2)

V. .

otherwise

 + t,

T, NT, - + t ,. Ht ,, (3)

H

Comparing expressions (2) and (3) with expression (1) implies that even, in the worst case, the absolute error of the proposed transformation is less than that of the known

Editor M. Bandura

Compiled by V.Voytov Tehred I. Gaidosh

Order 4142/59 Circulation 816 Subscription

VNSHSHI USSR State Committee

for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5

Production and printing company, Uzhgorod, st. Project, 4

ten

15

20

25

thirty

35

tuu n WHAT for example, when using TTL circuits it is 50-60 ns and it allows to increase the accuracy, especially when receiving short time intervals.

Claims (1)

Invention Formula The converter code is a time interval containing a multi-phase generator, the outputs of which are connected to the D-inputs of the corresponding D-flip-flops, the C-inputs of which are combined and are the output bus, the pulse counter, the information inputs of which through the recording gates are connected to the corresponding outputs the convertible code is registered in the country and the outputs to the corresponding first inputs of the comparison block with the zero code, the output of which is connected to the first input of the time interval formation trigger, the second input of which is the input width The output is different, and the output bus is different in that, in order to improve accuracy, an AND element and a bit comparison code block are entered in it, the first inputs of which are connected to the outputs of the corresponding D-flip-flops, the second inputs to the corresponding the outputs of the multiphase generator, and the inputs to the corresponding second inputs of the comparison unit with the zero code; the first input of the And element is the output bus, the second input is connected to one of the outputs of the multiphase generator, and the output is to the counting input of the pulse counter. Proofreader E. Sirohman