SU1248026A1 - Phase discriminator - Google Patents

Abstract

The invention relates to radio engineering and m. used in discrete automation systems to distinguish the sign of the phase difference of two pulse signals. Precision accuracy. The device contains four elements IS-NE 2, 7, 8 and 9, three flip-flops (T) 3, 6 and 11, inverter 4 and delay element (EZ) 10 .. After a time determined by the delay in EZ 10, on The 2nd input of the NES-2 element forms a pulse, which, when the sign of the phase difference between the input signals changes, will not coincide with the unit level at the 1st input of the AND-HL 2 element, and T 3 will be in positions 0. 4) Without the element AND-NE 8 g, the signal at 2 inputs of the elements Y-HE 7 and 8 will be set to T 6 in the O position, which will not change. Introduction to the device of the elements IS-HE 7, 8, 9 and T 6, 11, ensures the fixation of the levels of the output signals for any sign of the phase difference between the input signals, which increases the accuracy of the discrimination. 1 pe. About S after 00 about about:

Description

The invention relates to radio engineering and can be used in discrete automation systems for distinguishing the sign of the phase difference of two pulse signals.

The purpose of the invention is to increase the accuracy of the phase discriminator.

The drawing shows the structural electrical circuit of the proposed phase discriminator.

The phase discriminator contains the first input 1, the element AND-NOT 2, the trigger 3, the inverter 4, the second input 5, the first additional trigger 6, the first, the second and the third additional elements AND-NOT 7, 8 and 9, the delay element 10 and the second additional three ger 11.

The phase discriminator works in the following way.

The negative differential of the input pulse Xd sets the trigger 11 to state 1, preparing the operation of the NAND element 9. A positive front of the output pulse Xd leads to the formation of the output signal X0 at the output of the NES 9 element X 0, setting the thrung 3 to zero. At the same time, the Hc O (at the second inputs of the elements AND-NOT 7 and 8) and the elements AND-NOT 7 and are closed. After a time determined by the delay in the delay element 10, a pulse X 1 is generated at the second input of the element AND-NOT 2, and a signal X O is generated at the R input of the trigger 11, the latter returns the trigger 11 to its initial state. If the first input 1 has the signal X 1, the output level Xg of the element AND-NOT 2 turns out to be zero and the trigger 3 starts to set: it goes to position 1. This position will be fixed if the signal Xg will exist for some time (trigger time 3 ) after the termination of the signal X 0. The next negative signal differential Xd, inverted in inverter 4, polls the elements AND-HE 7 and 8, of which the first has two single signals at its inputs. At the same time, Xg O and trigger 6 are set to one position. Because in this case always. Xj 1, trigger 6 does not change its position and X is constant.

VNIIPI Order 4138/56

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When changing the sign of the phase difference between the input signals Hd; Xg signal X (. Hfc coincides with the unit level Xg, trigger 3 appears in the position O, and through element IS-NE 8 the signal Hz sets trigger 6 to the position O, which does not change already, i.e. X 1.

Thus, the introduction of additional elements and connections ensures the fixation of the output levels of the phase discriminator at any sign of the phase difference, thereby increasing the accuracy of discrimination.

In addition, the operation of the phase discriminator over a wide range does not depend on the duration of the input signals Hd at the second input of the phase discriminator.

Claims (1)

Invention Formula The phase discriminator containing the element NAND, the first input of which is 1 - ,,, -. is the first input of the phase discriminator, and the output is connected to the S-input of the trigger, the inverter, whose input is the second input of the phase discriminator, characterized in that, in order to make it more accurate, the first and second additional triggers are introduced into it, the first , the second and third additional elements AND-NOT and the delay element, while the direct and inverse outputs of the trigger are connected respectively to the first inputs of the first and second, additional elements AND-NOT, the outputs of which are connected to the S- and R- inputs of the first additional about the trigger, respectively, the second additional trigger, the third additional NAND element and the delay element are connected in series, while the direct output of the delay element is connected to the second input of the N – NO element, and the inverse output is connected to the R input of the second additional trigger, S- the input of which is connected to the second input of the phase discriminator and the second input of the third additional element AND-NOT, the output of which is connected to the R input of the trigger, and the second inputs of the first and second additional elements AND-NOT connected to the output at the inverter. Circulation 816 Subscription. 0 five 0 five 0 five