SU1246059A1 - Device for checking the wiring lay-outs - Google Patents

Abstract

This invention relates to automatic control and is intended to verify wiring diagrams. The introduction of the erroneous commutation analysis unit allows the device to expand its functionality, namely, to detect the missing and redundant links in the installation of the checked circuit, forming the value of the input and output address of the checked wiring circuit, between which an erroneous link takes place. The device comprises a pulse generator, first and second pulse counters, a switch, a control Number generation unit, a switching unit, a comparison unit, a standard storage unit, an erroneous switching analysis unit, a power unit. 1 3.p.f-ly, 3 and l

Description

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The invention relates to the field of automatic control and is intended to verify installation: schemes.

The aim of the invention is to expand the functionality of the device by revealing the missing and redundant links in the installation of the tested circuit.

FIG. 1 shows a block diagram of the device; in fig. 2 shows an example of implementation of a control number generation unit; in fig. 3 - an example of the implementation of the analysis block (erroneous switching).

The device contains the first pulse generator, the first counter of 2 pulses, the switch 3, the second counter of 4 pulses, block 5 and the device, input and output 6 and 7 of the device, the object to be checked (wiring diagram) 8 block 9 forming a control number, first block 10 comparison, the pattern storage unit 11, the output unit 12, the erroneous switching analysis unit 13.

The control number generating unit 9 contains AND elements 14 and 15, pulse counters 16-18, multiplication unit 19, dividing unit 20, adder 21, shift register 22.

The analysis block 1.3 contains the second pulse generator 23, the first and second registers 24 and 25, the second comparison block 26, the fourth, third, first. (Normally open) keys 27 - 29 vi the second (normally closed) key 30, the fourth and the third counters 31 and 32 pulses, block 33 subtraction, the third block 34 comparison.

The device works as follows.

The generator I with its pulses changes (output address) the state of the pulse counter 2 and of the switch (polling) 3. After the counter overflows, the pulse 2 changes (input address (rc) the state of the pulse counter 4 and, accordingly, the switching unit (input address object of control 8) 5, Thus, for each input address of the inspected object 8, all its points are carried out, which can be electrically connected by wiring to this input address.

If there is an electrical connection between the specified input and output addresses of the inspected object 8

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block 9 forms the control V J according to the formula .1-1KJ-2) -,

: v, j -,. (1)

where i is the number of the input address of the object being scanned; J is the number of the output address of the object being checked (1, J 1, p);

n is the number of survey points of the object being inspected 8.

This number from the output of block 9 enters the comparison block 10, where it is compared with the standard extracted from the standard storage block 11 by signals from the pulse counter 4. The cycle is carried out according to the instructions of the counter 4, which causes the signal to pause or stop in the pulse generator 1 and the command to the unit for storing the standards for the output of the reference number. For example, if the check is performed in one cycle, then overflow of counter 4 stops generator 1 and a single number is extracted from block 11, which is compared with the number obtained as a result of summing the numbers V- and located in shift register 22. In this case, block 11 is a register. In the case of several cycles, the comparison was carried out: several times.

Block 9 (Fig. 2). The formation of the control number 5 works as follows.

The next step of interrogating the electrical connection between some input i and output J addresses of the scan of the object being checked is counters 1 b - 18 pulses and the shift register 22 are zeroed, after which the number (-1) is entered into counters 17 and 16, number (-2), and in shift register 22, number 1 is in the lower order. If there is an electrical connection between the polling points of the object under test selected at this step, then, by the signal of the presence of this link, switch 4 and 15 and the number of the input address of the object being scanned is fed from the counter 4 pulses per counter, 16 pulses, where this number is decremented by one, and the number of the output address of the object being checked is fed from the counter of 2 pulses to counters and 1.8 1 mp5 where decreases

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respectively, on the unit and two. The contents of the counters 17 and 18 pulses go to the inputs of multiplication unit 19, then their product (, 1-1 (j-2) goes to divider 20, where it is divided in half.) In the adder 21, the number (il) from the counter 16 is added. and the numbers coming from dividing unit 20, after which, their sum K goes to shift register 22, in which the unit preliminarily added to the low-order bit moves to the left by K bit to which corresponds to the operation of raising the number 2 to the power K.

Thus, in the code block, the signals from the polling switch 3 and the counters (input and output addresses) of 4 and 2 pulses form the V number and according to the formula ()

If the monitored mounting scheme is as required, at the end of the monitoring cycle there is an equality of the reference and reference numbers and the output signal of the comparison circuit 10 is absent. If the control and reference numbers do not match the signal of the comparison unit 10, the binary value of the reference number from the reference number generation unit 9 and the reference number value from the standard storage unit 11 are entered into the binary registers 24 and 25, respectively. Writing the indicated numbers in binary registers means their decomposition in a power series with base two, with each significant digit of the control number indicating the existence of electrical connections between certain polling points of the circuit under test, and each significant digit of the number of the standard corresponds to a certain electrical coupling z between a pair of survey points. The quantitative connection of the numbers of survey points i, J with the value of the corresponding discharge of the control number and the reference number is determined by the formula ().

In addition, the signal from the unit 10 comparison about the mismatch of the control number with the reference starts the generator of 23 pulses, which with its pulses produces, starting from the lowest bit, a bit reading of the numbers contained in the registers 24 and 25. The counted values of the bits are supplied on block 26 comparison .46059

At the same time, the pulses from the generator 23 of the sleep pulse are fed through the keys 29 and 30, respectively, to the counters 3 and 32 pulses containing; mine are compared in block 34 comparisons. The latter generates a signal when the signals at its inputs match and does not emit a signal if the signals at its inputs are different. The output of the comparison unit 34 is connected to the control inputs of the keys 29 and 30, as well as to the installation input of the counter 32. The signal from the comparison unit 34 changes the state of the keys 29 and 30, as well as

(5 resets the contents of counter 32 to unity. In the initial state, the pulse counter 31 contains the number two, and the counter 32 is reset, the output signal of the comparator unit 34 is not present. The first pulse from the pulse generator 23 passes through a (normal-closed) switch 30 counts 32 pulses and writes one unit to one. The least significant bit. Contents.count 31 remains unchanged since the key 29 is open. After writing the unit to the counter 32 pulses, the signals at the inputs of the comparison unit 34 are compared and a signal appears at its output which changed t state of keys 29 and 30 to the opposite, as a result of which the next pulse from generator 23 goes through public key 29 only to counter 31, the contents of which increase

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by one followed by a signal on

the output of the comparison unit 34 disappears, and the keys 29 and 30 are returned to the initial state.

Thus, at each value of the SRI to the number contained in the counter 31, the contents of the counter of 32 pulses successively change from one to (N-1) At each step of counting, the bits of the reference number and the number of standards produced by the pulses of the generator 23, counters 31 and 32 determine the numbers, respectively, of the output J and the input i addresses of the electrical connections of the circuit being tested, corresponding to this bit of the check number. If at the next step of reading the bits from the registers 24 and 25 the values of the next bit of the control number and the reference number do not match, then the error signal appears on the comparison unit 26, which opens the normally open

keys 27 and 28, through which the block 12 of the output comes from counters 31 and 32, respectively, of the output and input addresses of the circuit under test, between which there is an erroneous (redundant or unavailable) electrical connection.

Claims (1)

Invention Formula  1. A control device for wiring diagrams containing a block, a first pulse generator connected by an output to the counting input of a first pulse counter connected by an overflow output to a counting input of a second pulse counter connected by an overflow output to the Stop input of the first pulse generator and to the input of a storage unit of standards, and the output to the input of the switching unit and to the first input of the control number generating unit associated with the second input with the code of the first pulse counter and with the control input comm the input connected to the input of the device and the output to the third input of the control number generating unit connected by the output to the first, input of the first comparison unit connected by the second input to the output of the standard storage unit, the output of the switching unit being the address output of the device, This is due to the fact that, in order to expand the functionality of the device by detecting the missing and redundant links in the installation of the checked circuit, a block of analysis of erroneous commutation is introduced into it i, connected by the first input to the output of the first comparison unit, the second input is the output of the control number, and the third input is to the output of the storage unit and the output standards, and the output is to the input of the output unit. 2, The device according to claim 15, wherein the erroneous switching unit L10 of the wrong commutation includes a second pulse generator, a second and third comparison block, a third and fourth pulse counter, a subtraction unit, four keys, the first and second registers, connected by installation inputs, respectively, to the second and third inputs of the analysis unit, outputs, respectively, to the first and second inputs of the second. 0 of the comparison unit, and the counting inputs to the output of the second pulse generator and to the information inputs of the first and second keys connected to the control inputs to the output of the third5 of its comparison unit and to the installation input of the third pulse counter connected by the counting input to the output of the second key ,, and the output - to the information input of the third key 0 and to the first input of the third unit. Comparison, connected by the second input to the output of the subtraction unit, connected by the input to the output of the fourth pulse counter and to the information input of the fourth key, the counting input of the fourth pulse counter is connected to the output of the first key, the output of the second block of comparison is connected to the control inputs Q of the third and fourth keys connected to the output of the analysis unit, the first input of which is the output of the second pulse generator. FIG. 2 § "five Editor N.Egorova Compiled by N.Gorbunova Tehred M.Hodanich Order 3998/40 Circulation 836. Subscription VNIIPI USSR State Committee for inventions and discoveries 1 13035, Moscow, Zh-35, Raushsk nab., d. 4/5 Production and printing company, Uzhgorod, st. Project, 4 Proofreader L. Tsilipenko