SU1238143A1 - Graphic information output device - Google Patents

Abstract

This invention relates to the field of computing technology. It can be used as an output of mainframe computers or a specialized device in the systems of operative communication of a person with a computer. The aim of the invention is to expand the functional capabilities by providing the possibility of analog scaling of an image horizontally. The goal is achieved by introducing a horizontal scaling unit into the device. to 00 00 with

Description

The invention relates to computing technology, is intended for displaying graphical information from a computer, and may be used in design and construction automation systems, in automated data processing, in dialog systems.

The aim of the invention is to expand the field of application of the device by providing the possibility of scaling the image horizontally.

The drawing shows the block diagram of the device.

The device contains a memory unit 1, a first decoder 2, a modulation unit 3, a first distributor of 4 pulses, a synchronization unit 5, an address switch 6, a television indicator 7, a coordinate conversion unit 8, a second decoder 9, a counter of 10 lines, a counter 11 words, sampling counter 12, second pulse distributor 13, controlled pulse generator 14, code-voltage converter 15, first register 16, second register 17, adder 18.

The device works as follows.

The synchronization unit 5 generates an imp. 1s corresponding to the required screen rasterization of the television indicator 7 and controls the scanning of the latter. These pulses arrive at the counter of 10 lines and the counter 11 words, making them temporarily tied to the television clock signal.

In the memory block, each point corresponds to one bit, encoding the brightness of a point. In this case, the coordinates of the image recorded in memory block 1 form a field of mathematical coordinates of horizontal dimension A of points and vertically 2 points with a coordinate origin in the lower left corner. The word width of memory block 1 is 2 bits. On the screen of the television indicator 7, only points forming the field of physical coordinates of the screen can be displayed, and,.

From the synchronization unit 5, the permissive inputs of the counter 11 words, the sampling counter 12 and the controlled generator 14 pulses receive signals of the visible line stroke. These signals allow their operation. The controlled pulse generator 14 generates clock pulses, the frequency of which is controlled by the voltage received from the output of the converter 15, the voltage code. The output voltage of the converter 15 code-voltage is determined by the scale factor Ml-, the binary code of which is stored in the first register 16. The signals from the output of the controlled oscillator 14 are fed to the sampling counter 12 and the second distributor 13 pulses, which together with the second decoder 9 generates the signals necessary to implement the read cycle

from block 1 of memory, control the operation of block 3 and add units to the counter 11 words. The outputs of the counter 11 words and the counter 10 lines together with the address of AIKL. form the current hatch address read, defined by the formula

A.ok Ai .. + + j,,

where i is the current value of the counter 10 lines;

j-current counter value 11 words;

tiiM ,; - the duration of the reading cycle of a word from memory block 1, corresponding to a given scale factor MD.

When scaling an image, the read cycle time t from memory block 1 and the image point forming time in modulation unit 3 change in proportion to the change in the frequency of the controlled oscillator 14, that is, the scale factor MD, thus. horizontally. The advantage of this scaling is its almost continuous nature, which is achieved by an appropriate choice of z size.

code md-. When selecting the appropriate one. Their ranges of change of the frequency of the controlled oscillator 14, the proposed device allows to realize not only the stretching of the image, but also its compression. To form a formula, the multiplication i 2 ° is performed by connecting the outputs of a 10-row counter to the inputs of the adder 18, shifted by (a - p) bits towards CTapujnx. At the same time, the outputs of the counter 11 words are connected to the younger (a-p-) discharges.

Information is recorded in memory block 1 and converted into a video signal completely B according to the description of the prototype device.

Thus, the invention, compared to the prototype, permits scaling of the image horizontally due to the fact that the frequency of reading words in a line varies in proportion to the scale factor MD.

Claims (1)

Invention Formula A device for outputting graphic information comprising a serially connected coordinate conversion unit, a first decoder, a memory unit, a modulation unit and a television indicator, the second input of which is connected to the first output of the synchronization unit, the address switch, the output of which is connected to the memory unit, the first and the second inputs are with the coordinate conversion unit, the third input is with the first output of the pulse distributor, the second output of which is connected to the first decoder, the third and fourth outputs are connected to the memory block, In order to expand the field of application of the device by allowing the image to be mapped horizontally, it contains the first register, the output of which is connected to the input of the code-voltage converter, the output of which is connected to the first input of the controlled pulse generator, the output of which is connected with the first inputs of the second pulse distributor and the sampling counter, the output of which is directly and via the second decoder connected to the second and third inputs of the second partition respectively pulse limiter, the first output of which is connected to the first input of the word counter, the output of which is connected to the first input of the adder, the second input of which is connected to the input of the row counter. The third and fourth inputs are connected to the first and second (second register, first and second .U, I row counters respectively) connected to the second and third outputs of the synchronization unit, the inputs of the sampling counter of the controlled pulse generator and the word counter are connected to the fourth output of the block synchronization, the second output of the second distribute, 1 is connected to the third input of the modulation unit, the outputs of the controlled pulse generator and the second decoder are connected respectively to the first and second inputs of the first switch impu divider., first and second outputs of the adder are connected respectively with the fourth and fifth inputs of the switch address inputs of the first and second registers are respectively the first and second inputs.