SU1238074A1 - Signature analyzer - Google Patents

Abstract

The invention relates to computer technology and can be used to monitor and diagnose digital devices with two and three stable states. The purpose of the invention is to increase the speed of the analyzer. The signature analyzer contains an encoder, a time generator, signals, a display unit, an EXCLUSIVE OR element, and a signature generator, which contains the first and second parity generation elements and the shift register. The essence of the functioning of an andlizator is that, depending on whether binary information or information about the third state is present at its input, it is convolved into two different constituent denominations. The resulting complex signature reflects the presence and location of the logical O, logical 1, and third state signals of the input information sequence. Fixing of any of the three possible states of the input-information fault occurs in one period of the external clock signal, which ensures an increased speed of operation. I il. § (L to from 00 about 4ib

Description

"

The invention relates to computing and can be used to monitor and diagnose digital devices with two and three stable states.

The purpose of the invention is to increase the speed of the analyzer.

The drawing shows a block diagram of the signature analyzer for the particular case of two generating polynomials of the sixteenth degree

. F (x) and. F (x).

The signature analyzer contains an encoder 1, a shaper of 2 time signals, an indication unit 3, an EXCLUSIVE RSHI element 4, a shaper of 5 signatures, which in turn contains the first 6 and second 7 parity elements and the shift register 8.

Elements 6 and 7 of the formation of parity have control inputs A,. When they are sent to the signal O, their operation is allowed; when applying the signal 1, it is prohibited. The logic of the encoder is as follows:

Input Output 1 Output 2 000

one

one

About 1

The group of information inputs of the first parity forming element 6 is connected to the outputs of the fourth, seventh, ninth and sixteenth bits of the shift register 8, which corresponds to the forming polynomial

F, (x).

The group of information inputs of the second parity forming element 7 is connected to the outputs of the third, fourth, fifth, and sixteenth bits of the shift register 8, which corresponds to the polynomial

F (x) x - + x -M.

The signature analyzer works as follows.

The information sequence arriving at the input of the encoder 1, and consisting of a signal with three states, is converted at the outputs of the encoder into a two-bit sequence. Shaper 2 time signals on control signals Start, Stop and Sync. forms a stack of clock pulses within ok380742

on measurements determined by Start (start of window) and Stop (end of window) signals. Input information sequence synchronized

5 control signal Sync. If the signal O or 1 is present at the information input of the analyzer, then the output of the EXCLUSIVE OR 4 element produces signals that enable the parity element 6 to work and prohibit it; the operation of parity element 7. In this case, the low-order bit of the 8 shift register is written

15 information modulo two input information and information from the outputs of register bits 8 defined by the first constituent polynomial. If on the information

At the input of the analyzer there is a signal with the third state, then at the output of the EXCLUSIVE OR 4 element, signals are generated that permit the operation of the parity element 7 and

25 prohibiting the operation of the element 6 of the formation of parity. In this case, the shift register 8 through the parity element 7 is a generator

30 pseudorandom sequence with the second generator polynomial.

In the course of operation, a sequential switching of elements 6 and 7 of the formation of parity occurs, and the result accumulated in shift register 8 until the moment of switching remains after switching of elements 6 and 7, the pseudo-random sequence generator continues to work from the accumulated state. After the arrival of the control signal, the Stop in the shift register 8 records 45 with a complex signature reflecting the presence and location of the signals O, 1 and the third state in the input information sequence. This signature is displayed.

50 block 3 display.

In the proposed analyzer, the fixation of any of the three possible states of the input information bus occurs 55 in one period of the external clock signal, which provides an increased speed in comparison with the prototype.

Claims (1)

Invention Formula A signature analyzer containing an encoder whose input is the information input of the analyzer, the time signal generator, the display unit, the first parity shaping element and the shift register, the analyzer Start, Stop and Synchronization inputs are connected to the group of control inputs of the time signal generator, the output of which is connected (the synchronous input of the shift register, the first and second groups of outputs of which are associated respectively with the group of inputs of the display unit and the group of information inputs of the first element This formation of parity, the output of which is connected to the information . GB Start Stop. a, sync Editor M. Tovtin Order 3292/49 Circulation 671 Subscription VNIIPI USSR State Committee for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5 Production and printing company, Uzhgorod, st. Project, 4 five the input of the shift register, characterized in that, in order to increase speed, it contains an EXCLUSIVE OR element and a second element of the formation of parity, a group of information inputs and an output of which is connected to the third group of outputs and the information input of the shift register, respectively, gates of the first and second the elements of the formation of parity are connected respectively to the direct and inverse outputs of the EXCLUSIVE OR element, whose inputs are connected to the first and second outputs of the encoder, the first output of the encoder By connecting the data input of the first parity generating element. five Cuffxp. 1H.5.Component S. Starchikhin Tehred M. Khodanich Proofreaders. But ha