SU1228213A1 - Amplitude disctriminator - Google Patents

Abstract

This invention relates to radio engineering and provides improved accuracy by reducing the phase shift. The input signal, depending on polarity, passes to the adder 7 and then through the LPF 3 to the output either through the primary key 1 or through the inverter 4 and the additional key 5. The signals from the keys 1 and 5 also go to the main and additional comparators 2, 6. If a positive signal is received, it passes through the public key 1, and the signal from the comparator 6 turns off the key 5. After the polarity of the input signal is changed, a zero voltage level appears at the output of the comparator 6, which includes the key 5. In this case key 1 is turned off. As a result, two-half-wave detection of the input signal is provided. Switching the keys 1, 5 according to the output signals allows to detect signals with a rapidly varying frequency. 1 il. C B (L

Description

The invention relates to radio engineering and can be used in demodulators of information transmission systems with amplitude modulation.

The purpose of the invention is to improve accuracy by reducing the phase shift.

The drawing shows the functional electrical circuit of the proposed amplitude detector.

The amplitude detector contains a main key 1, a main comparator 2, a low-pass filter 3, an inverter 4, an additional key Z, an additional comparator 6, and an adder 7.

The device works as follows.

Primary key 1 and additional key 5 are turned on if the voltage on their control inputs is zero, and is vyuyucheny, if the voltage on their control inputs has a positive value, i.e. 1. When there is no signal at the input of the amplitude detector, the voltage at the output of the voltage keys is zero, the output voltage comparators 2 and 6 iia are also zero, and both keys 1 and 5 are turned on. With the arrival of the input positive signal, the keys 1 and 5 pass it to the output, and the signal at the output of the primary key 1 increases as the input signal increases, and at the output of the additional key 5 decreases relative to zero. The phase change of the signal by 180 is provided by the inverter 4, however, the inverter 4 connected in series and the additional key 5 can also be performed on one stage in the form of a so-called inverting key. At the output of the additional comparator, a positive voltage appears, which goes to the control input of the additional switch 5 and turns it off. In this case, the main comparator 2 does not change its state, and the zero voltage level at its output does not turn off the main key 1, the positive voltage from the output of the key 1 through the adder 7 and the low-pass filter 3 goes to the output of the device.

After changing the polarity of the input signal, at the moment when the main key 1 appears at the output, negative28213

the south voltage, at the output of the additional comparator 6, a zero voltage level appears, and at the output of the main comparator 2 5 a positive voltage level. In this case, the primary key 1 is turned off, and the additional key 5 is turned on. Input negative;}, the voltage is inverted by 180 in inverter 4

to and through the additional key 5, the adder 7 and the filter 3 of the lower frequencies is fed to the output of the device. As a result, a two-half-period detection of the input

15 beeps. Keys 1 and 5 introduce a delay, i.e. change the phase of the signal depending on the frequency of the input signal. But since the keys switch at the time of transition of the voltage across it, through zero value, when the output parasitic capacitances of the keys are not charged, the voltage at the output of the lockable key does not change and does not introduce errors

25 detection. Therefore, switching the keys on the output signal, rather than on the input signal, makes it possible to detect signals with a rapidly varying frequency.

30 A detection error in the proposed amplitude detector is due to a delay in the propagation of the signal in the comparators. The delay of the signal in the comparator leads to

35

that the key is turned on and off later than the point in time when the key output crosses the zero value. Comparators 2 and 6 can be made on the basis of standard high-speed integral comparators of the type 597CA2, the guaranteed delay time of signal propagation in which is not more than 12 NS. Such a delay time allows the proposed detector to provide a relative detection error of 0.2% at an input signal frequency of 10 MHz.

50

Claims (1)

Invention Formula The amplitude detector containing the main key, whose information input is the input of the amplitude detector, the main comparator, the output of which is connected to the control input of the main key, and a low-pass filter whose output is the output of the amplitude detectors torus, characterized in that, in order to improve accuracy by reducing the phase shift, an inverter and an additional key, an additional comparator, and an adder, the output of which is connected to the input of the low-pass filter, are input to the inverter. the main key, the output of the additional comparator is connected to the control input of the additional key, the outputs os228213L new and additional cdgyuches are connected respectively to the first and second inputs of the adder, the non-inverting input of the main comparator and the inverting input of the additional comparator are combined with each other and connected to the output of the additional key, and the inverting input of the main comparator 0 and the non-inverting input of the additional comparator are combined between themselves and connected to the output of the main key.