JPH0342785Y2 - - Google Patents

Description

[Detailed Description of the Invention] Industrial Application Field The present invention relates to a digital color killer detection circuit, and more particularly, to a circuit for obtaining a color killer detection signal that cuts off a carrier color signal processing system during monochrome broadcasting.

Prior Art FIG. 7 shows a block system diagram of an example of a conventional color killer detection circuit (level killer detection).
In the figure, the composite video signal input to terminal 1 is passed through band filter 2 to carry color signals (during color broadcasting).
Or the noise component (during black and white broadcasting) is extracted, the color burst signal or a part of the noise component is extracted by the burst gate circuit 3, and the amplitude detector 4 converts it into a DC voltage according to the amplitude level, and the level is determined. It is compared with the threshold level in circuit 5, and when it is below the threshold level, it is regarded as a color killer detection signal, and the signal is sent to terminal 6.
taken out from

On the other hand, FIG. 8 shows a block system diagram of another example of the conventional color killer detection circuit (APC killer detection). In the same figure, a carrier color signal (during color broadcasting) or a noise component (during black and white broadcasting) inputted to terminal 1 is extracted by a burst gate circuit 3, where a part of the color burst signal or noise component is extracted, and a part of the color burst signal or noise component is extracted by a phase comparator 7. The signal is phase-locked by a PLL composed of crystal VC08, phase-shifted by 90 degrees by a 90 degree phase shifter 9, and phase-detected by a phase detector 10, and sent to an integrating circuit (low-pass filter) 11. is integrated, and the phase of the signal is ±
If it is not within 90°, it is considered a color killer detection signal.
It is taken out from terminal 6.

Problems to be Solved by the Invention The device shown in Figure 7 has a problem in that particularly high-level noise components are detected as a color burst signal, and the signal is erroneously detected as a color broadcast even though it is a black and white broadcast.

On the other hand, the one shown in FIG. 8 requires many circuits such as a 90° phase shifter 9, a phase detector 10, a phase comparator 7, and an integrating circuit 11. Especially when a digital signal processing circuit is configured, the circuit Not only could it not be simplified, but it also had the problem of not being able to perform high-speed signal processing because it uses an integrating circuit.

An object of the present invention is to provide a digital color killer detection circuit that has a simple circuit configuration, can process signals at high speed, and can accurately detect color killers.

Means for Solving the Problems In the present invention, between the frequency f _B of a color burst signal sampled at a constant sampling frequency f _C and the sampling frequency f _C , f _C =4Nf _B (N is a positive integer), it is constructed using the following means.
14 is a frequency divider which divides the clock of the sampling frequency f _C to produce a 4N frequency divided output signal Q _B and a 2N frequency divided output signal.
Output Q and _A respectively. A delay device 16 outputs a delayed signal B obtained by delaying the color burst signal or a signal other than the color burst signal by N sampling periods N/f _C . 15 is a discrimination circuit, and the 4N
The frequency-divided output signal Q _B , the 2N frequency-divided output signal Q _A ,
The color burst signal or a signal A other than the color burst signal and a delayed signal B are supplied,
For each of the first to fourth states obtained by the combination of the signal level of the 4N frequency-divided output signal Q _B and the signal level of the 2N frequency-divided output signal Q _A , the color burst signal or the color burst It is determined whether the phase of a signal other than the signal is within a range of ±90° with respect to the phase of the 4N frequency-divided output signal Q _B.

Particularly _, this discrimination circuit 15 determines whether _the color whether the sign of the burst signal or the signal A other than the color burst signal and the sign of the delayed output signal B are both negative;
When the sign of the color burst signal or a signal A other than the color burst signal is positive and the sign of the delayed output signal B is negative, the phase of the color burst signal or the signal other than the color burst signal is 4N. It is determined that the signal level of the 4N frequency divided output signal Q _B is within a range of ±90° with respect to the phase of the frequency divided output signal Q B, and the signal level of the 4N frequency divided output signal Q _B is a first signal level, and the signal level of the 2N frequency divided output signal Q In the second state where the signal level of _A is a second signal level, the sign of the color burst signal or a signal A other than the color burst signal is positive, and the sign of the delayed output signal B is negative? , when the sign of the color burst signal or the signal A other than the color burst signal and the sign of the delayed output signal B are both positive, the phase of the color burst signal or the signal other than the color burst signal is 4N. It is determined that the phase of the frequency-divided output signal Q _B is within a range of ±90°, and the signal level of the 4N frequency-divided output signal Q _B is a second signal level, and the signal level of the 2N frequency-divided output signal Q In the third state where the signal level of _A is the first signal level, the sign of the color burst signal or a signal A other than the color burst signal and the sign of the delayed output signal B are both positive; When the sign of the color burst signal or a signal A other than the color burst signal is negative and the sign of the delayed output signal B is positive, the phase of the color burst signal or the signal other than the color burst signal is 4N. The signal level of the 4N valve frequency output signal Q _B and _the 2N
In the fourth state in which the signal levels of the frequency-divided output signal Q _A are both at the second signal level, the sign of the color burst signal or a signal A other than the color burst signal is negative, and the sign of the delayed output signal B is negative. When the sign of the color burst signal or the signal A other than the color burst signal and the sign of the delayed output signal B are both negative, the color burst signal or the signal other than the color burst signal It is determined that the phase of the signal is within a range of ±90° with respect to the phase of the 4N frequency-divided output signal _QB , and the color burst signal in each of the first to fourth states or the color burst signal If the phase of the signal is outside the range of ±90° with respect to the phase of the 4N frequency-divided output signal Q _B , a color killer detection signal is output.

Function: The 4N counter 14 divides the clock with the sampling frequency f _C by a number of 4N or less and outputs each divided output signal to the ROM 15, and outputs the color burst signal supplied from the terminal 12 or a color burst signal other than the color burst signal. The signal is delayed by N sampling periods N/f _C in the N clock delay device 16, and the 4N-base counter 1 is stored in the ROM 15.
The sign of the color burst signal or a signal other than the color burst signal in each of the first to fourth states obtained by the combination of the sign of the 4N frequency divided output signal and the sign of the 2N frequency divided output signal output from 4. Corresponding to each combination of the sign of the output signal of the N clock delay device 16, the phase of the color burst signal or a signal other than the color burst signal is ± with respect to the 4N frequency divided output signal output from the 4N base counter 14. The color killer detection signal is determined if the phase of the color burst signal or a signal other than the color burst signal is outside the range of ±90 degrees with respect to the phase of the 4N frequency divided output signal. Output.

Embodiment FIG. 1 shows a block diagram of an embodiment of the circuit of the present invention. In the same figure, the color burst signal input to terminal 12 is a digital signal sampled at a constant sampling frequency _fC ;
It is assumed that there is a relationship between f _B and f _C =4N·f _B (where N is an integer greater than or equal to 1). Here, to simplify the explanation, N=
Set to 1.

The sampling clock f _C (A in FIG. 2) inputted to the terminal 13 is divided into two signals Q A (B in the same figure) by a 4N counter (frequency divider) 14, and a signal Q _A (B in the same figure) is divided into four.
Q _B (C in the same figure) and is supplied to the ROM 15, which will be described later. As is clear from FIG. 2, four states exist depending on the combination of the signal levels "H" and "L" of the signals Q _A and Q _B. Signal divided by 4
As can be seen from the above equation, the frequency of Q _B is equal to the frequency f _B of the color burst signal, so the signal Q _B is used as a reference signal, and the phase of the color burst signal or noise component entering terminal 12 is relative to the reference signal. By detecting whether or not the angle is within the range of ±90°, it is possible to detect that if it is within the range of ±90°, it is a color broadcast, and if it is not within the range of ±90°, it is a black and white broadcast. .

Figures 3 and 4 show a reference signal (solid line), a color burst signal (dashed line) whose phase is within -90° and lagged with respect to this reference signal, and a color burst signal whose phase is within +90° with respect to the four states shown in Figure 2. This shows the relationship with the phase-advanced color burst signal (dotted chain line). As is clear from the figure, when the reference signal is in, for example, the phase of the color burst signal is ±
In order to be within the 90° range, the amplitude of the delayed color burst signal must be in the state ′ (negative),
One sampling period before, it is in the state ' (negative), and in the phase-advanced color burst signal, its amplitude is in the state ' (positive), and one sampling period before, it is in the state '' (positive).
(negative). In addition, when the standard signal is in the state, for example, in order for the phase of the color burst signal to be in the range of ±90°, the amplitude of the color burst signal with a slow phase must be in the state ′ (positive), and one sampling period Before, it is in state ′ (negative),
In a phase-leading color burst signal, its amplitude is in the state "(positive)" and must be in the state "(positive) one sampling period before." Other states,
This can also be considered in the same way.

Here, if the positive/negative sign of the amplitude of the color burst signal or noise component that enters the terminal 12 is A, and that of the color burst signal or noise component one sampling period before is B, then the respective signs in the above states ~ A and B are as shown in FIG. Therefore, if the state ~ and codes A and B are stored in the ROM 15, then the state ~ and the code A,
B, it can be determined whether the incoming signal is within the range of ±90° with respect to the reference signal.

In other words, as shown in Figure 1, the 4N base counter 1
The output signals Q _A and Q _B of 4, the sign A of the amplitude of the incoming signal from the terminal 12, and the sign B of the amplitude of the incoming signal delayed by one sampling period by the N clock delay device 16 are as follows.
It is supplied to the ROM 15, and the output signals Q _A and Q _C determine one of the four states ~, and whether or not it is within a range of ±90° from the combination of signs A and B in each state ~. shows. Sensing output data is selected and retrieved.

If the H level of the signals Q _A and _{Q B} shown in FIG. _B , code A,
The relationship between B and detection output data C is as shown in Figure 6. 0 in detection output data C indicates that the phase is within ±90° and color broadcasting, and 1 in detection data C indicates that the phase is within ±90°. A value other than ゜ indicates that a color killer was detected during black and white broadcasting.

It should be noted that similar results can be obtained by using a logic circuit for performing calculations as shown in FIG. 6 in place of the ROM 15.

In the case of N=2, from the 4N base counter 14,
The signal Q _A divided by 2, the signal Q _B divided by 4, and the signal Q _C divided by 8 are output to the ROM 15, respectively, and the color burst signal supplied from the terminal 12 to the N clock delay device 16 is as follows. The signal is delayed by two sampling periods and output to the ROM 15. And ROM
15, from the combination of color burst signal _A and signal B delayed by two sampling periods in four states obtained by the combination of signal levels "H" and "L" of signal Q B and signal Q _C , N As in the case of =1, by detecting whether the angle is within the range of ±90°, it can be determined whether the broadcast is in color or black and white.

Similarly, when N=3 or more, the colors in the four states obtained by combining the signal levels "H" and "L" of the 4N frequency-divided signal and the 2N frequency-divided signal supplied to the ROM 15 are Burst signal A
From the combination of signal B delayed by N sampling periods, it is possible to detect whether the broadcast is in color or black and white.

Effects of the invention The digital killer detection circuit of the invention divides the clock of sampling frequency f _C to produce a 4N divided output signal Q _B
Frequency divider 1 outputs the and 2N frequency divided output signal Q _A , respectively.
4, a delay device 16 that outputs a delayed signal B obtained by delaying the color burst signal or a signal other than the color burst signal by N sampling periods N/f _C , a 4N frequency-divided output signal Q B, and a 2N frequency-divided output signal Q _B. Output signal Q _A and color burst signal or signal A other than color burst signal
and delayed signal B are supplied, and the 4N frequency divided output signal is
For each of the first to fourth states obtained by the combination of the signal level of Q _B and the signal level of the 2N divided output signal Q _A , the phase of the color burst signal or a signal other than the color burst signal is changed by 4N. Since it is configured with a discrimination circuit 15 that discriminates whether the phase is within ±90° with respect to the phase of the frequency output signal _QB , signal processing can be performed at a higher speed than analog signal processing using an integrating circuit. It can also do temperature changes,
Since it is not affected by changes over time or the signal level of the color burst signal, it is possible to always perform stable signal processing.

In addition, using phase shifters, phase detectors, etc.
It has a simpler configuration than the APC killer detection circuit, so
It is easy to convert the circuit into an IC, and costs can be reduced.

Further, it has the effect of being able to detect more accurately than the level killer detection circuit.

[Brief explanation of the drawing]

1 and 2 are block diagrams and signal waveform diagrams for explaining the operation of an embodiment of the circuit of the present invention, respectively; FIGS. 3 and 4 are diagrams showing the phase relationship between the reference signal and the color burst signal; FIG. 5 is a diagram showing the signs of the color burst signal in each state and the color burst signal one clock before, FIG. 6 is a diagram showing the relationship between the sign of the signal to be stored in the ROM and the detected output data, and FIG. and FIG. 8 are block diagrams of various examples of conventional circuits. 12...Video signal input terminal, 13...Clock input terminal, 14...4N base counter (frequency divider), 1
5...ROM (discrimination circuit), 16...N clock delay device, 17...color killer detection signal output terminal.

Claims (1)

[Claims for Utility Model Registration] Between the frequency f _B of a color burst signal sampled at a constant sampling frequency f _C and the sampling frequency f _C , f _C = 4Nf _B (N is a positive integer). ), the clock with the sampling frequency f _C is divided into 4N
a frequency divider 14 that outputs a divided output signal _QB and a 2N divided output signal _QA , respectively _; a delay device 16 that outputs the delayed signal B, the 4N frequency-divided output signal Q _B , the 2N frequency-divided output signal Q _A , the color burst signal or a signal A other than the color burst signal, and the delayed signal B. is supplied, and for each of the first to fourth states obtained by the combination of the signal level of the 4N frequency divided output signal Q _B and the signal level of the 2N frequency divided output signal Q _A ,
The phase of the color burst signal or a signal other than the color burst signal is the 4N frequency divided output signal Q _B
and a discrimination circuit 15 for discriminating whether or not the _phase is within a range of ±90°.
In the first state in which the signal level of the frequency-divided output signal Q _A is both at the first signal level, the sign of the color burst signal or a signal A other than the color burst signal and the sign of the delayed output signal B are are both negative, or when the sign of the color burst signal or the signal A other than the color burst signal is positive and the sign of the delayed output signal B is negative, the color burst signal or the signal other than the color burst signal It is determined that the phase of the signal is within a range of ±90° with respect to the phase of the 4N frequency-divided output signal Q _B , and the signal level of the 4N frequency-divided output signal Q _B is the first signal level. In the second state in which the signal level of the 2N frequency-divided output signal Q _A is a second signal level, the sign of the color burst signal or a signal A other than the color burst signal is positive and the delayed output signal B is negative, or when the sign of the color burst signal or the signal A other than the color burst signal and the sign of the delayed output signal B are both positive, the color burst signal or the signal other than the color burst signal It is determined that the phase of the signal is within a range of ±90° with respect to the phase of the 4N frequency-divided output signal Q _B , and the signal level of the 4N frequency-divided output signal Q _B is a second signal level. In the third state where the signal level of the 2N frequency divided output signal Q _A is the first signal level, the sign of the color burst signal or a signal A other than the color burst signal and the sign of the delayed output signal B are both positive, or when the sign of the color burst signal or a signal A other than the color burst signal is negative and the sign of the delayed output signal B is positive, the color burst signal or the signal other than the color burst signal It is determined that the phase of the signal is within a range of ±90° with respect to the phase of the 4N frequency division output signal Q _B , and the signal level of the 4N valve frequency output signal Q _B and the 2N
In the fourth state in which the signal levels of the frequency-divided output signal Q _A are both at the second signal level, the sign of the color burst signal or the signal A other than the color burst signal is negative, and the sign of the delayed output signal B is negative. When the sign of the color burst signal or the signal A other than the color burst signal and the sign of the delayed output signal B are both negative, the color burst signal or the signal other than the color burst signal It is determined that the phase of the signal is within a range of ±90° with respect to the phase of the 4N frequency divided output signal _QB , and the color burst signal or the color burst signal other than the color burst signal in each of the first to fourth states is A digital color killer detection circuit that outputs a color killer detection signal when the phase of the signal is outside the range of ±90° with respect to the phase of the 4N frequency divided output signal _QB .