SU1221716A1 - Device for generating pulse sequences - Google Patents

Abstract

The invention can be used in automation devices, in control systems of digital electronic circuits and allows to expand their functional capabilities. The device contains a pulse generator 1, address blocks 2 and 3, memory blocks 4 and 5, counters 6 and 7, trigger 8, control bus 9, output bus 10. The first line of memory blocks 4 and 5 contains a binary digital code corresponding to the number of pulses of the generator 1, laid down in the duration, respectively, of the first pulse of the generated sequence and the pause between the first and second pulses of the generated sequence. The number of lines is determined by the number of pulses in the sequence being formed, and the number of bits by the maximum pulse duration and pause 1 sludge. 1 y J od

Description

one

The invention relates to a pulse technique and can be used in automation devices, in control systems of digital electronic circuits.

The aim of the invention is to extend the functionality

The drawing shows a functional diagram of an apparatus for generating pulse sequences. A device for generating pulse sequences contains a pulse generator 1, address blocks 2 and 3, memory blocks 4 and 5, counters 6 and 7 pulses, trigger 8, control bus 9, output bus 10 with outputs of address block 2 through block 4 and counter 6 connected with the R-input of the trigger 8, the outputs of the address block 3 through the block 5 and the counter 7 are connected to the S-input of the trigger 8, the output of the generator 1 is connected to the subtracting inputs of counters 6 and 7,

The first line of block 4 contains a binary digital code corresponding to the number of pulses of the generator 1, placed in the duration of the first pulse of the generated sequence. Accordingly, the t-th line contains the binary digital code of the number of generator pulses that fit into the duration of the i-ro pulse of the generated sequence.

The second line 5 contains the motorized digital code of the number of pulses of the generator 1, which is laid down in the duration of the pause between the first and second pulses of the generated sequence.

Accordingly, the (1 + 1) -th row contains the binary digital code of the number of generator pulses, which are laid down in the length of the pause between the i-M and (i + 1) -M pulses of the generated sequence.

The number of lines in blocks 4 and 5 is determined by the number of pulses in the sequence being formed, and the number of bits is determined by the maximum duration of the pulse and pause, respectively.

Counter 6 counts down the number of generator pulses that fit into the pulse duration of the generated sequence,

Counter 7 counts down the number of generator pulses that fit into the duration of the pauses.

2217162

formed sequence. In the initial position, the pulses at the output of the generator 1 are absent, at the outputs Q,., Q | address blocks 3

, and 2 the codes of the first lines of blocks 4 and 5 are set, the counter 7 is set to the zero state, the counter 6 is set to one, the zero potential is fed to the output bus 10 from the trigger 8,

The control bus 9 receives a zero potential, which corresponds to the formation by the device of a pulse sequence of the first

, 5 species.

The device works as follows

When turning on the generator 1 after the passage of the first pulse clock

20 frequencies, a negative pulse appears at the counting input of counter 6 at the transfer output of counter 7, which sets the trigger 8 to one state, i.e.,

25 the beginning of the first pulse of the sequence. Also, the transfer pulse from the output of the counter 7 enters the clock input of the address block 3 and increases its state by one ,,,, and the address code of the second row of the block 5 is set at the output of the address block 3,

Also, the transfer pulse from the output of counter 7 is fed to the resolution input of block 4, at the outputs of which | and, respectively, at the inputs of counter 6, the code of the number of pulses of generator 1 appearing in the first pulse appears in the first line of block 4.

On the falling edge of the transfer pulse arriving at the counting input (c) of counter 6, the specified code is recorded in counter 6, operating in subtraction mode. After a time L equal to the duration of the first pulse of the sequence being formed, a negative pulse appears at the transfer output of counter 6, which sets trigger 8 to the zero state, i.e., the formation of the first pulse of the sequence ends. The transfer pulse from the output of the counter 6 sets the address block 2 to the state corresponding to the address of the next line (second), and enters the resolution input of block 5, At the outputs of block 5 and, respectively, at the inputs of counter 7 to 40

50

55

is the code of the number of pulses of the generator 1 recorded in the second line and placed into the pause between the first and second pulses of the generated sequence f. On the falling edge of the transfer pulse from the output of counter 6, this code is written into counter 7, which also operates in subtraction mode.

After a time, - equal to the duration of the pause between the first and second pulses, a negative pulse appears at the transfer input of the counter 7, which sets the trigger 8 to one state. Also, the transfer pulse of the counter 7 sets the address block 3 to the state corresponding to the address of the third row of block 5. The process of forming the remaining pulses and pauses of the sequence of the first type continues as described. When forming a pulse sequence of another type (for example, a sequence radiated by the alternation of permutations of the values of the durations of the pulses and pauses sewn up in blocks 4 and 5), a single bus is fed to the control bus 9

potential f

In this case, the address codes of the rows at the inputs of address blocks 2 and 3 alternate according to the law of permutations.

Editor L.Povkhan

Order 1619/58 Circulation 816 Subscription VNIIPI USSR State Committee

for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab., 4/5

Branch PPP Patent, Uzhgorod, Proektna St., 4

12217164

Claims (1)

 Invention Formula 0 five A device for generating pulse sequences, containing a pulse generator, Lotor's output is connected to the subtractive input of the first pulse counter, and the first address block and the first memory block sequentially connected, which in order to expand its functionality, serially connected the second address block, the second memory block, the second pulse counter and trigger, R, the input of which is connected to the output of the first pulse counter, with a clock input of the first address block a, with the enable input of the second memory unit and with the counting input of the second pulse counter, the output of which is connected to the S input of the trigger, to the clock input of the second address block, to the resolution input of the first memory block and to the counting input of the first pulse counter, information inputs which is connected to the outputs of the first memory block, the subtracting input of the second pulse counter is connected to the output of the pulse generator, and the control input of the first address block is connected to the control input of the second address block and the control bus neither 0 five Compiled by V. Chizhov Tehred V. Kadar Proofreader A. Obruchar