SU1218382A1 - Device for executing statistical checking by grouping method - Google Patents

Abstract

The invention relates to computing and can be used to control the accuracy and accuracy of technological processes. The invention makes it possible to increase the reliability of the information provided. The device contains an input unit 1, the counter 2 total number; measurements, the counter 3 of the sum of deviations, blocks 4 and 7 of the comparison, block 5 of setting the volume of output, block 6 of the display, block 8 of control, performed on the elements AND-NE 13-16 and inverters 17 and 18, reversible counters 9 and 10, decoders 11 and 12, with the comparison block 7 consisting of short-circuit RS-flip-flops 19, 20 and switches 21, 22. 2 Cp f-ly, 1 ill. § (Л с «S N5 00 from 00 1ЧЭ I

Description

The invention relates to a scraper technique and can be used in devices for controlling the accuracy and tuning of technological processes.

The aim of the invention is to increase the reliability of the information provided.

The drawing shows the functional diagram of the device for statistical control by the grouping method.

The device contains an input unit 1, a counter 2 of the total number of measurements, a counter 3 of the sum of deviations, the first unit A of comparison, the unit 5 for setting the output volume, the unit 6 for indicating, the second unit 7 for comparison, the unit 8 for control, the first and second reversible counters 9 and 10 , the first and second decoders 11 and 12, wherein the control unit 8 consists of the first, second, third and fourth elements AND-NO 13-16 and the first and second inverters 17, 18, and the second comparison unit 7 consists of the first and second RS -triggers 19, 20, and the first and second switches 21 and 22.

Input unit 1 serves to switch incoming input signals n,, n having the following meanings: n ° is the parameter in norm, n is the parameter above the norm, and n is the parameter below the norm.

The device works as follows.

On the signal Start of operation, coming from an external control device, the input unit 1 opens and the signals n °, n +, n, which arrive in series at the inputs of the device, pass to the output of unit 1, and at the same time go to the inputs of counters 2, 3 and the outputs of the elements AND-NOT 13 16. The counter 2 of the total number of measurements summarizes the signals received by the input over the inputs p, p, p. The counter 3 of the sum of deviations summarizes the signals arriving at the inputs n and p.

Counters 9 and 10

calculate the difference by counting the number of signals

who drank at the entrance p and at the entrance

p (n - n) 3 as follows

In the initial position, the counters 9 and 10 are in the zero state. In this case, at the zero outputs of the decoders 11 and 12, there are output signals in the form of logical zeros.

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These signals set triggers 19 and 20 to a state where there is no output signal on their outputs.

In addition, logical zeros from the outputs of the decoder 11 and 12 are received respectively at the inputs of the elements AND NOT 14, 16, prohibiting the passage of signals n and n to the subtracting (-1) inputs of counters 9 and 10, respectively. These logical zeros go to the inputs of the inverters 17 and 18, and at their outputs, enabling signals appear crosswise to the inputs of the AND-HE elements 13, 15, allowing the signals to pass through and the summing inputs of counters 9 and 10, respectively.

Thus, in the initial state, the counter 9 is open for summing the signals, and the counter 10 is open for summing the signals n, while the subtracting inputs are closed. If signals with a value of n are received first, then the reversible counter 9 starts summing them up, since they go to its summing input. After the summing of the first signal at the zero output of the Q-decoder 11, the zero signal changes to a single one, which. enters the input element AND-NOT 14, allowing the passage of signals to the subtracting (-1) counter input 9.

In addition, a single signal from the output of the decoder 11 is fed to the input element AND NOT 15 and closes the summing input of the counter 10.

If, at the output of the input unit 1, a signal with the value η is passed, then it will go to the subtractive input of counter 9 via the AND-NO element 14 and the unit will be deducted from its accumulated sum of signals π.

If, when summing the signals n, their sum exceeds the limit value set for them, then from the output of the decoder 11 through the switch 21 to the input S of the trigger 19 will receive a signal. RS flip-flop 19 will change its state and the signal from its output will go to the input of display unit 6. However, the information on block 6; will not be issued, since there is no signal of the end of the sample from block 5 of the installation of the sample size.

If now signals with a value of n begin to arrive, they will

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subtract the sum of the signals accumulated in counter 9 with a value. When the sum of the signals in the counter

9 will be equal to zero, at the zero output of the decoder 11, according to Wits, a zero signal, which enters the input of the element AND-NOT 14, prohibits the passage of signals to the subtractive input of the counter 9, and also

to the input R of flip-flop 19, erasing the previously valuable signal exceeding the limit value. In addition, the prohibitory (zero) signal from the zero output of the decoder 11 is fed to the input of the inverter 17. The output of the inverter 17 causes a resolving signal that goes to the input of the AND-15 element, allowing the signal to pass | Lov n to the summing input of the second | reversible counter 10 The counter | lO begins to sum the signals with the value n and subtract the signals with the value n. At the same time, at the zero output of the decoder 12 there is a single (enabling) signal that permits the passage of the signals n to the subtracting (-1) counter input 10 as well as through the input Intertor 18 arrives at the input of the NAND 13 element, prohibiting the arrival of signals at the summing gate 1. (+ 1) counter input 9 The receipt of signals n at the subtracting (-1) counter input 9 is prohibited by the signal from the zero output of the decoder 11.

The operation of the RS flip-flop 20 is similar to the operation of the KZ-flip-flop 19. Thus, the first counter 9 calculates the value + (, p), and the second counter

10 calculates the value of - (n, n), if at the time of the end of the sample size, which is determined by the moment when the counter 2 of the sum of the total number n + n + n + accumulates a number equal to the sample size, and block 5 you. will give a signal to the input of the display unit 6, the counter 9 will accumulate a number greater than the value specified for it, and the RS flip-flop 19 will have a state when its output will be a single signal, on the display of the display unit 6 that the parameter is higher than normal. Similarly, if such a state is in the counter 10 and the RS-trigger 20, then the parameter Below the norm will be given. If in counters 9 or 10 a number less than the specified limit value is accumulated, and in the counter 3 sums

deviations will be a number greater than the limit set for it, then a signal will be given on the display of block 6, meaning that the process is normal, but the accuracy is bad, there are many deviations from the norm in this or the other direction.

Claims (3)

1. A device for statistical control by the grouping method, comprising an input unit, the inputs of which are information inputs devices, and the outputs are connected to the corresponding inputs of the counter of the total number of measurements, the counter of the sum of the deviation and the control unit, the outputs of the counter of the total number Measurements are connected to the inputs of a block of volume installation, the first output of which is connected to the reset input of the input unit, and the second to the first input of the display unit, the outputs of the counter of the sum of deviations through the first comparison unit are connected to the second input of the display unit, the third and fourth inputs which are connected to the corresponding outputs of the second comparator unit, the first and second outputs of the control unit are connected respectively to the summing and subtracting inputs of the first reversible counter, characterized in that. that, in order to increase the reliability of five These information, the second reversible counter and the first and second decoders are entered into it, the third and fourth outputs of the control unit are connected to the summing and subtracting inputs of the second reversing counter, respectively; the outputs of the first and second reversing counters are connected to the first and second decoders respectively, respectively second groups of inputs of the second comparison unit, the first outputs of the decoders are connected respectively to the first and second additional inputs of the control unit. 2. The device according to claim 1, about tl and - the fact that the control unit contains the first, second, third and fourth elements AND-NOT and the first and second inverters, the first inputs of the first and fourth, as well as the second and the third element AND NOT Q $ 12183826 respectively combined and connect 3. The device according to claim 1, is distinguished to the corresponding inputs of the blocking so that the second control, the outputs of the first, second, comparator block contains the first and third and fourth elements of 5 P ° RS-flip-flops and the first and second AND-NOT connected to the corresponding switches, the first inputs of each The outputs of the control unit, the second group of inputs of the second unit, the comparative input of the second element, AND –NOT are not connected to the R inputs corresponding to the first additional input of the first and second RS-trigger blocks. control and through the first in-10 ROV, and the remaining inputs through the correlator are connected to the second input one-third of the first and second switches of its IS-NOT element, the second input of the Quaternators are connected to the S-inputs of the corresponding Element IS-IE combined with the second is the first and the second RS trigger input of the game control unit, the outputs of which are connected to through the second inverter is connected to the VTO-is the corresponding outputs of the second the first element of the AND-NE.block comparison unit.