SU1211728A1 - Priority device - Google Patents

Abstract

The invention relates to automation and computer technology and is intended for use in devices that fulfill the function of a pinch. The purpose of the invention is to reduce the amount of equipment - by introducing new elements and changing functional relationships. The device contains registers, two elements OR, two triggers, the element NOT, the elements AND groups, the element I. The reduction in the amount of equipment is achieved by changing the functional connections and eliminating some elements. 1 il.

Description

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The invention relates to digital computer technology and can be used in data processing systems.

The purpose of the invention is to reduce the amount of equipment of the device.

The drawing shows a block diagram of the device.

The device contains triggers 1 of the first register, triggers 2 of the second register, elements AND 3 groups, elements OR 4.5, triggers 6.7 element HE 9s clock input 10 of the device, outputs 1 of the device, query inputs 12 of the device, responsive inputs 13 of the device.

The device works in the following way,

In the initial state, the triggers 1.2 are set to O by signals from inputs 3. With the same signals, trigger 6 is set to 1. When one or more signals arrive at inputs 12, the corresponding triggers 1 are set to state 1. By the clock signal from input 10 the contents of the triggers 1 are copied to the triggers 2, the control of writing to the triggers 2 is carried out using the triggers 6,7 and the element And 8.

Then the clock CHrHajiy from input 10 1 from the output of the highest priority of the flip-flops 2 through the corresponding AND 3 element enters one of the outputs 1. The signal from one of the outputs 11 through the OR 4 element

resets to O the triggers 6,, 7, and the arrival of the clock pulses through the element And 8 on the triggers 2 stops.

After processing the request, the external device sends a signal to one of the inputs 13 and the corresponding trigger 1 is set to O. After that, the device passes to the outputs 1 the next priority request or, if the requests

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absent, returns to the initial state.

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acquisitions

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A priority device containing: two registers, a group of elements I, two ICTM elements, the single input of each bit of the first register connected to the corresponding inquiry input of the device, each output of the first register connected to a single input of the same name of the second register, direct output each bit of the second register is connected to the first input of the same name element AND group, the second inputs of elements AND group are connected to the clock input of the device, the outputs of elements AND group are in the device group, if In order to reduce equipment, the device contains a NOT element, two flip-flops and an AND element, the clock input of the device through the element is NOT connected to the clock input of the first trigger and the first input of the And element, the second input and output of which are connected respectively to the output first trigger and s. clock inputs of the first register, the zero inputs of which are connected to the group of response inputs of the device, with the inputs of the first OR element and zero inputs of the second regis- tra, the output of the first RSHI element is connected to the single input of the second poi o trigger, the output of which is connected to the single :: the input of the first trigger, the zero input of which is connected to the zero input of the second trigger and the output of the second element I1Sh, whose inputs are connected to the output group of the device, the zero output of each bit of the second register is connected to the corresponding uyor-mi entrances of all subsequent elements AND groups.

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Compiled by M. Kudr Shev Editor N. Shvydka Tekhred T. Tulik Proofreader E. Sirohman

Order 641/53 Circulation 673 Subscription

VNIIPI USSR State Committee

for inventions and discoveries 113035, Moscow, Zh-35, Raushsk nab. D. 4/5

Branch of PSh Patent, Uzhgorod, Proektna St., 4

Claims (1)

Claim A priority device, comprising: two registers, a group of AND elements, two OR elements, with a single input of each digit of the first 10 register connected to the corresponding request input of the device, each output of the first register connected to a single input of the same category of the second register, direct output of each bit of the second the register is connected to the first input of the same element AND groups, the second inputs of elegance And groups are connected to the clock input of the device, the outputs of the elements AND groups are a group of device outputs characterized in that, with the forehead of equipment reduction, the device contains an element AND, and two triggers and an element AND, moreover, the clock input of the device through the element is NOT connected to the clock input of the first trigger and to the first input of the element And, the second input and 3Q output of which are connected respectively with the output of the first flip-flop and a clock input of the first register to zero inputs of which are connected with a group of input responses _p roystva mouth, with the inputs of the first OR gate and a zero input of the second register, the output of the first OR gate is connected to a single input of the second trigger, the output of which is connected to a single input of the first 40 of the trigger, the zero input of which is connected, with the zero input of the second trigger and with the output of the second OR element, the inputs of which are connected to the group of outputs of the device, the zero output of each discharge of the second register is connected to the corresponding inputs of all subsequent elements of the AND group.