SU1203502A1 - Information input device - Google Patents

Description

(21) 3768728 / 24-24

(22) 07/11/84

(46) 07.01.86. Bul № 1

(72) S.G. Karlov and A.I. Fox Nsky

(53) 681.327.11 (088.8)

(56) USSR author's certificate

No. 669350, cl. G 06 F 3/02, 1978.

USSR Author's Certificate No. 940149, cl. G 06 F 3/02, 1980,

USSR author's certificate number 1005012, cl. G 06 F 3/02, 1981,

(54) (57) DEVICE FOR INPUT OF INFORMATION, containing keyboard, serially connected multiplexer and first matching element, one-shot, first and second counters, decoder, AND-NOT element second matching element, delay element and pulse generator whose output is connected to the element input delay, the output of which is connected to the first input of the second matching element, the output of which is connected to the counting input of the second counter, the outputs of which are the outputs of the device, the outputs of the first and second matching el ments are combined by wired OR circuit and connected to the counting input of the first counter, setting the inputs of which are connected to

the output of the one-shot, the input of which is combined with the input of the first matching element, the outputs of the first group of the first counter are connected to the inputs of the decoder, the outputs of which are connected to the vertical keyboard buses, the horizontal pins of which are connected to the information inputs of the multiplex pexor, the address inputs of which are connected to the outputs of the second group of the first the counter, the output element AND-NOT is the output Interrupt device, characterized in that, 8 in order to improve the reliability of the device, it introduced the first and second P-trigger ry and RS-trigger, the inverse output of which is connected to the first input of the NAND element, the second input of which and the D input of the second I) -trigger are connected to the inverse output of the first D-trigger, the S input of which and the R input of the RS trigger are the Reset input of the device, the D-inlet of the first D-trigger is connected to the output of the second matching element, the second input of which, the installation input of the second counter and the S-input i of the S-flip-flop are connected to the inverse output of the second T-trigger, the T-input of which T-input of the first D-trigger connected to the output of the pulse generator. The invention relates to automation and computing and can be used in keyboard input devices. The purpose of the invention is to increase the reliability of the device. Figure 1 shows the block diagram of the device proposed in Figure 2 - a timing diagram of a signal interrupt circuit. The device contains a keyboard, the first counter 2, the decoder 3, the multiplexer 4, the one-shot 5, the chatter protection circuit 6, the first matching element 7, the second matching element 8, the first delay element 9, the pulse generator 10, the first D-trigger 11, the second counter 12, the first RS flip-flop 13, the second D-flip-flop 14, the NAND element 15 contained in the bounce protection circuit 6, the second delay element 16 and the second RS-flip-flop 17. The device operates as follows. After turning on the power, the generator 10 and its output pulses through the first delay element 9 and the second matching element 8 are fed to the C inputs of the first counter 2 and the second counter 12. As in the general case, the initial state of the counters 2 and 12 is undefined, their work is synchronized as follows. When you press any key on the keyboard, for example, the Reset key, the horizontal and vertical buses of the keyboard 1 are electrically interconnected, the vertical buses of the keyboard 1 are connected to the outputs of the decoder 3, and the horizontal ones - to the inputs of the multiplexer 4. The output pulses from the outputs of the second group of the first counter 2 is fed to the address inputs of the multiplexer 4 and periodically allow the passage of information from its inputs to the outputs. The output pulses from the outputs of the first group of the first counter 2 are fed to the inputs of the decoder 3, at the outputs of which a sequence of pulses of the negative field is shifted, shifted one relative to the other by a pulse length. 02 Negative pulses from the outputs of the decoder 3 arrive at the corresponding vertical keyboard busses 1 and through the closed contact of the pressed key to the input of multiplexer 4, and if this input is addressed by the first counter 2, the low potential level goes to the output of the multiplexer 4 and through the chatter protection circuit 6 to the input of the first matching element 7, the output of which is connected to the output of the second matching element according to the OR circuit, and the inhibiting potential at the output of the first matching element 7 blocks the bottom with potential th level pulses on passing the link. The counting inputs of the first 2 and second 12 meters no longer receive pulses, and the meters are in the state of information storage. When the key is released, a negative voltage drop appears at the output of the bounce protection circuit 6, which enters the input of the one-vibrator 5, and a short negative polarity pulse is generated at its output, nulling the first counter-2. The first delay element 9, the first L-flip-flop 11, the first JS-flip-flop 13, the second P-flip-flop 14, the IS-NOT 15 element serve to generate a signal Interrupt and zero the second counter 12 to release a key on the keyboard 1. The operation of this part of the diagram is illustrated The time diagram shown in FIG. In the initial state after the signal arrives at the device input, the negative polarity is reset at the inverse output of the first D-flip-flop 11 - high level - voltage, at the inverse of the first RS-flip-flop 13 - low voltage level, at the inverse output of the second D-flip-flop 14 - high voltage level, at the output of the element AND-NOT 15 - high voltage level. When the first D-flip-flop 11 receives a positive voltage drop from the output of the pulse generator, the first D-flip-flop 11 is set to state 1. By pressing a key, a low potential appears at the output of the first matching element 7,

which locks the communication line for the entire time the keypad is pressed.

When the rtep D trigger of 11 arrives at the T input, the next positive voltage across its J) input is low, the trigger 11 is set to B O. When you release the key on the keyboard 1 for 1) the input of the first D trigger 11 a high level appears from the output of the first matching element 7, which sets in 1 trigger 11 upon arrival at the T input of the next positive voltage drop. On the falling edge of the pulse from the inverse output of the first J) trigger 11 to the second D-flip-flop 14 is recorded 1, since at this time a high voltage level from the generator output is at the D-input of the flip-flop 14, which corresponds to a negative differential voltage on the inverted output trigger 14.

At the end of the generator's positive pulse, the second D-trigger 14 at the T-input is set to O, which corresponds to a high level at the inverse output of the trigger 14. Thus, a negative polarity reset pulse is formed at the inverse output of the second D-trigger 14. This impulse zeroes the second counter 12, the first RS flip-flop is set to 1, which allows the signal to go Fail from the inverse output of the first D-flip-flop 11 to the output of the AND-NOT element 15, but since by this time the inverse output of the first D- the trigger 11 will be a low voltage level; there will be no signal to prevent the output of the AND-15 element.

So, after first pressing the keyed on keyboard 1,

203502

for example, the Reset keys, the first counter 2 and the second counter 12 simultaneously nullify and then work synchronously, since by releasing any keypad on the keyboard 1, both counters null simultaneously and the counting inputs of both counters are connected together,

10 The next time you press a key on the keyboard 1, the circuit operates in the same way as one of the inputs of the NAND 15 element has a high potential from the inverse of the output of the first RS flip-flop 13, the Interrupt signal from the inverse of the first D-trigger 11 passes through the AND element - NOT 15 on the device output. And since the first 2 and

20 second 12 counters work synchronously, then the information about the key code pressed will be the same in both counters and the computer on a signal the Interrupt reads information about

25 code of the pressed key from the second counter 12.

The proposed device for entering information allows it to be used for transmitting information 30, and its reliability is increased. This is achieved by the fact that the binary information corresponding to the pressed key is not transmitted over a distance, but is generated directly at the input of the computer.

The positive effect of using the invention lies in increasing reliability by reducing to one line of communication between the information input device and the computer and, therefore, increasing the reliability of the automated system in which the device operates.