SU1200379A1 - Flip=flop with noise immunity - Google Patents

Description

The invention relates to a pulse technique and can be used in digital computers, as well as in measuring and control devices.

The aim of the invention is to improve the noise immunity under the influence of short-term common mode noise, · · · '*'

FIG. 1 is a functional 10 noise-resistant trigger circuit; on firm l2 -! · equivalent circuit of a logic element with an output accepting three states included in the device. · 15

The noise-resistant trigger contains the first 1 and second 2 logic elements, the outputs 3 and 4 of which are connected respectively to the first information inputs of the second 2 and 20 of the first 1 logic elements and connected to the outputs of the noise-resistant trigger, the second information inputs 5 and 6 of the logic elements are information inputs 25

noise-resistant trigger, the logic elements with three states, information input 5 of the first logic element 1 is connected to the control input of the second logic element 2, and information input 6 of the second logic element 2 is connected to the control input of the first logic element

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Figure 2 shows the equivalent circuit of a logic element, with three states, consisting of a two-stable logic element 7 and a key 8, which under the influence of a control signal can go into a high-impedance (third logical) state.

The noise-resistant trigger works as follows.

Fault states of a trigger, corresponding to different combinations of signals at its th and 5 - inputs, are characterized by a truth table given for the case of triggering on the OR-NOT gates.

GN-1

P + 1

about o <) ^p

O I o i

Irregularities of error-correcting K5 -triggera is that with short exposure simultaneously to K - and 5- interference signal inputs corresponding to the logical "I", (the last truth table output line Trigg ra Neba disconnected and go into a high impedance (the third logical ¹⁾ state, and parasitic capacitances between the trigger outputs and the common bus ensure the safety of data in the form of accumulated charge; the state of the trigger at its outputs does not change, that is, the trigger maintains its previous state.

To build a noise-resistant trigger, you can use three-state logic elements on the output, which perform AND-NOT and OR-NOT operations. These elements allow you to build three variants of the actual trigger scheme: a trigger on two AND-NOT elements, a trigger on two OR-NOT elements and a trigger on AND-NOT and OR-NOT elements.

Claims (1)

NOISE-RESISTANT TRIGGER, containing the first and second logic elements, the outputs of which are connected respectively to the first information inputs of the second and first logic elements and connected to the outputs of noise-resistant trigger, the second information inputs of logic elements are connected to the corresponding information inputs of a noise-resistant trigger, characterized in that, in order to improve noise immunity under the influence of short-term common mode noise, logic elements are made with three states, the information input of the first logic element is connected to the control input of the second logic element and the information input of the second logic element is connected to the control input of the first logic element. Ca5 M > 1200379