SU1197090A2 - Device for determining rank of number - Google Patents

Abstract

1. DEVICE FOR DETERMINATION. NIA RANK NUMBERS on author. St. No. 1125619, characterized in that in order to extend the functionality by detecting errors, it contains blocks multiplying by a constant with (ntl) -ro to

Description

1 The invention relates to computing and can be used in devices operating in the system of residual classes (JUICE), as well as in communication technology as part of information accessibility devices. The purpose of the invention is to enhance the functionality by detecting errors. FIG. 1 shows a functional diagram of the device for the rank of a number; n FIG. 2 is a schematic diagram of the comparison. A device for determining the rank of a number contains blocks 1 and 2 multiplied by a constant modulo, a group of elements OR 3 and 4, adders 5 and 6 modulo, a block 7 converting a non-positional code into a position code, a counter 8, a comparison circuit 9, an input 10 residues, the outputs of the 11th and 12th steps of the number, the output of the 13th error, the output of the 14th number in the positional representation, the unit 15 multiplied by a constant, the clock input 16. The comparison circuit 9 contains the elements EXCLUSIVE OR 17 and the element OR 18. The installation inputs to the initial state and synchronization of the adders 5 and modulo, as well as the control input of the block 7 are not shown. The device uses the following method for determining the rank of the number. In the RP Ts P range, we set the number A to the residues d, 2 t, a / nn c (ntK 1 D ... n + k represent residues on k redundant bases. Then the rank of the number is equal to p „b« ”(M RC . l | mocl (pl. -;. (Alp - positional representations. aggregates of residues on excess bases. Tech as the value of Г | (1А1р) not it, -t; i | - 1 (max exceeds r, Gt J 90 the highest value of the rank), then, when errors occur, most of the calculated values of Gr (lAlt) exceed g. The percentage of numbers that are outside the II P range that are detected when calculating the rank is -.-). (WP-1) Obviously, The error rg (lAli) differs from the truthI p / / 1,, + of the value of r (1 Alp) / hook as A is out of range. Consequently, if the true value is determined as r r (lAlp) Gr (| A (p) indicates that there is an error. The device for determining the rank of a number works as follows. In the initial state, the adders 5 and 6, as well as the counter 8, are cleared. In the first cycle, the enabling signal for the formation of / rRrrp respectively, at the outputs of the blocks, the units of the module modulo 1.1, 1.2, 2.1 and 2.2, as a result, at the outputs of the adders modules 5 and 6, the values are formed ((i / 3 I PR Mi i in gRg / p, respectively. If in adder 6: modulo is converted modulo, then on the transfer bus of adder 6 pulses are generated, increasing the contents of counter 8 by one. Similarly, the conversion process continues until the content of the adder 5 is modulo increased by the value generated at the outputs of the nonpositional code to positional conversion unit 7 multiplied by the modulo constant 15 by the value of P41 Block 7 of the nonpositional code conversion to positional representation It is a switching device that converts CV residuals, the position number oSc, and can be any known device for converting a nonpositional code into a binary code. After that, the output bus of the summator 5 modulo the value of 1 j iiu midi fiirus iv-n jna Г Г () at the outputs the counting value gr (), at output 8 the value of RP RP 6 modulo the value dah of the adder A If the distortion of the number A did not occur, then any of the calculated values can be used. With rf (| Alp) at least on one output of the adder 5, corresponding to JHi mC JHlPKt corresponding to 2 Z bits, there is a signal of a logical unit, therefore, the unit in these bits unambiguously indicates an error. Therefore, these bits are directly connected to the inputs of the OR 18 element of the comparison circuit 9. The values of all remaining least significant bits of adder 5 are compared on the EXCLUSIVE OR 17 elements with the values of the corresponding bits of the counter 8. A mismatch also clearly indicates the occurrence of an error, the signal with which is formed at the output of the OR 18 element (output 13). Thereafter, the process of calculating the rank of the number and checking whether A is completed correctly. The proposed device also makes it possible to obtain the position code of a number (output 14) represented in the SOC.

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Claims (2)

1. DEVICE FOR DEFINITION-. NII RANGE OF NUMBERS by author. St. No. 1125619, characterized in that in order to expand functionality by detecting errors, it contains blocks of multiplication by a constant from the (n + 1) th in the (2n + 1) th, third and fourth groups of OR elements, the second adder modulo , a counter, a comparison circuit, and a unit for converting a non-positional code into a positional one, with the inputs of residues on redundant bases of the device connected to the corresponding inputs of the unit for converting the non-positional code into positional, the inputs of the residuals of the device are connected respectively to the inputs of the blocks more niya on. a constant from the (n + 1) th through the 2 nth, the outputs of the odd and even blocks of multiplication by a constant from the (n + 1) th through the 2 n-th are connected respectively to the inputs of the OR elements of the third and fourth groups, the outputs of which are connected respectively to the first and second inputs of the second adder are modulo, the sum and transfer outputs of which are connected respectively to the output of the number in the positional representation of the device and the counting input of the counter. whose output is the output of the rank of the number and is connected to the first input of the comparison circuit, the output and second input of which are connected respectively to the device error output and to the output of the first adder modulo, the output of the non-position code to position conversion unit is connected to the input of (2n + 1) a unit of multiplication by a constant, the output of which is connected to the inputs of the OR elements of the second group, the clock inputs of the units of multiplication by a constant with the S (n + 1) -th in the (2n + 1) -th are connected to the clock input of the device. 2. The device according to π. 1, characterized in that the comparison circuit contains EXCLUSIVE OR elements (k = Jlog ₂ r _w [, where r _m is the maximum value of the true rank) and an OR element, and the first inputs of the EXCLUSIVE OR elements are connected to the first input of the comparison circuit, to the lower the bits of the second input of which are connected to the second inputs of the corresponding EXCLUSIVE OR elements, the outputs of which and the remaining bits of the second input of the comparison circuit are connected respectively to the inputs of the OR element, the output of which is the output of the comparison circuit. SU OL 197090