SU1196852A1 - Unit for forming ripple-through carry in adder - Google Patents

Abstract

BLOCK FORMATION. THROUGH THE TRANSFER IN THE SUMMATOR, containing four elements AND-NOT, the output of the first element AND-NOT connected to the first input of the second element, the second, whose input is connected to the transfer input of the -block, inputs from the first to the fifth third and AND-NOT connected to the corresponding inputs of the block transfer distribution, (n + 1) -th input of the third element. AND-NOT connected to the input of the initial crossover of the block, the output of the third AND-NOT element is connected to the first input of the fourth-element IS-NOT element, the second input of which is connected to the output of the second element AND-GNE, in The output of the fourth AND-NOT element is connected to the transfer output of the block, characterized in that, in order to simplify the circuit, the inputs from the first to the fifth (L of the first AND-NO element are connected to the corresponding inputs of the third AND-NOT element.

Description

CSD 05 00

ate

tsD 1 The invention relates to computing and can be used in the construction of multi-bit high-speed adders. The aim of the invention is to simplify the through-transfer formation unit in the adder. The drawing shows the functional on the scheme of the block of formation of through transfer in the adder. The block contains four elements I1-4 and has a transfer input 5, a transfer distribution input 6, an initial transfer input 7, and a transfer output 8, the block operates as follows. The input 7 receives the signal of the initial transfer-Co, and the inputs 6 - the distribution propagation signal Р-Х ®, where X, Y are the binary digits of the terms (i 1,2, ..., p). The unaccelerated transfer signal C Vt generated by the p-bit adder arrives at the input of block 5, B the p-type adders for the accelerated and unaccelerated transfer signals the following logical expression P, D, etc. ., ....- a, p „... P, C, P„ ... P,, -C 2 Y. V signal generation pegde H. renaissance from The switching elements AND-NOT 1-4 are designed in such a way that, at output 8, a signal is generated:, p, .... p, c, p, ... p,. Substituting in (2) the expression (1) for the signal S supplied to the input 5, and taking into account that the SCR C for the signal C generated at the output 8, we arrive at the expression, (1). Thus, the signal generated at the output 8 of the device is a transfer signal, which is evidence of the operability of the block. Forward throughput transfer blocks are designed to accelerate the propagation of transfer in the case of 9 P, ..- P 1. This block eliminates the influence of the signal C | supplied to the device input 5, to the signal C generated at the device output 8, with Р Pj ... P „1. In this case, as follows from the expression. nor (2), Cp Cc, and this block provides fast formation of the signal Cp, at output 8 when switching the signal C, at input 7 from both -o at the input and from 1 to O to G

Claims (1)

FORMATION BLOCK. THROUGH TRANSFER IN THE SUMMER, containing four AND-NOT elements, the output of the first AND-NOT connected to the first input of the second AND-NOT, the second. the input of which is connected to the block transfer input, the inputs from the first through the pth third element AND are NOT connected to the corresponding inputs of the block transfer distribution, the (n + 1) -th input of the third element is NOT connected to the input of the initial block transfer, output of the third AND-NOT element is connected to the first input of the fourth AND-NOT element, the second input of which is connected to the output of the second AND-NOT element, the output of the fourth AND-NOT element is connected to the transfer output of the block, characterized in that, for the sake of simplification circuits ^ inputs from the first to the nth first element AND NOT dinen with the corresponding inputs of the third element AND NOT.