RU2445680C1 - FUNCTIONAL STRUCTURE OF THROUGH CARRY f1(←←)i+1 AND f2(←←)i OF CONVENTIONALLY "i+1" AND CONVENTIONALLY "i" DIGITS OF "k" GROUP OF ARGUMENTS OF MULTIPLICAND [ni]f(2n) OF PRELIMINARY SUMMATOR fΣ([ni]&[ni,0]) OF PARALLEL SERIES MULTIPLIER fΣ(Σ) (VERSIONS) - Google Patents

FUNCTIONAL STRUCTURE OF THROUGH CARRY f1(←←)i+1 AND f2(←←)i OF CONVENTIONALLY "i+1" AND CONVENTIONALLY "i" DIGITS OF "k" GROUP OF ARGUMENTS OF MULTIPLICAND [ni]f(2n) OF PRELIMINARY SUMMATOR fΣ([ni]&[ni,0]) OF PARALLEL SERIES MULTIPLIER fΣ(Σ) (VERSIONS) Download PDF

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RU2445680C1
RU2445680C1 RU2010145099/08A RU2010145099A RU2445680C1 RU 2445680 C1 RU2445680 C1 RU 2445680C1 RU 2010145099/08 A RU2010145099/08 A RU 2010145099/08A RU 2010145099 A RU2010145099 A RU 2010145099A RU 2445680 C1 RU2445680 C1 RU 2445680C1
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conditionally
logical functions
category
group
bits
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RU2010145099/08A
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Лев Петрович Петренко (UA)
Лев Петрович Петренко
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Лев Петрович Петренко
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Abstract

FIELD: information technologies.
SUBSTANCE: in one of the versions the functional structure is made in the form of two digits of k group and contains four OR logical elements and one AND logical element in the conventionally "i+1" digit, and three OR logical elements and one AND logical element in the "i" digit.
EFFECT: improved efficiency of through carries
Figure 00000095
formation process in the summator.
5 cl

Description

Текст описания приведен в факсимильном виде.

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The text of the description is given in facsimile form.
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Claims (5)

1. Функциональная структура сквозного переноса
Figure 00000044
и
Figure 00000045
условно «i+1» и условно «i» разрядов «k» группы аргументов множимого
Figure 00000046

предварительного сумматора
Figure 00000047
параллельно-последовательного умножителя
Figure 00000048
, выполнена в виде двух эквивалентных по структуре логических функций условно «i+1» разряд и «i» разряд, которые включают соответственно логические функции
Figure 00000049
,
Figure 00000050
, в которых функциональные входные связя являются функциональными выходными связями соответственно логических функций
Figure 00000051
,
Figure 00000052
,
Figure 00000053
,
Figure 00000054
и
Figure 00000055
,
Figure 00000056
,
Figure 00000057
, отличающаяся тем, что функциональные связи логических функций в структурах сквозного переноса
Figure 00000058
и
Figure 00000059
условно «i+1» и условно «i» разрядов «k» группы выполнены в соответствии с математической моделью вида
Figure 00000060

где
Figure 00000061
- логическая функция
Figure 00000049
;
Figure 00000062
- логическая функция
Figure 00000051
.1. Functional structure of end-to-end transfer
Figure 00000044
and
Figure 00000045
conditionally “i + 1” and conditionally “i” bits “k” of the group of arguments of the multiplicable
Figure 00000046

preliminary adder
Figure 00000047
parallel to serial multiplier
Figure 00000048
is made in the form of two logical functions equivalent in structure to the conditionally “i + 1” category and “i” category, which include logical functions, respectively
Figure 00000049
,
Figure 00000050
in which the functional input links are functional output links, respectively, of logical functions
Figure 00000051
,
Figure 00000052
,
Figure 00000053
,
Figure 00000054
and
Figure 00000055
,
Figure 00000056
,
Figure 00000057
characterized in that the functional relationships of logical functions in end-to-end transfer structures
Figure 00000058
and
Figure 00000059
conditionally “i + 1” and conditionally “i” of bits “k” of the group are made in accordance with a mathematical model of the form
Figure 00000060

Where
Figure 00000061
- logical function
Figure 00000049
;
Figure 00000062
- logical function
Figure 00000051
. 2. Функциональная структура сквозного переноса f1(←←)i+1 и f2(←←)i условно «i+1» и условно «i» разрядов «k» группы аргументов множимого
Figure 00000046

предварительного сумматора
Figure 00000047
параллельно-последовательного умножителя
Figure 00000048
, выполнена в виде двух эквивалентных по структуре логических функций условно «i+1» разряд и «i» разряд, которые включают соответственно логические функции
Figure 00000063
,
Figure 00000064
, а также логические функции
Figure 00000051
,
Figure 00000052
,
Figure 00000053
,
Figure 00000054
и логические функции
Figure 00000055
,
Figure 00000056
,
Figure 00000057
соответственно, отличающаяся тем, что функциональные связи логических функций в структурах сквозного переноса
Figure 00000058
и
Figure 00000059
условно «i+1» и условно «i» разрядов «k» группы выполнены в соответствии с математической моделью вида
Figure 00000065

где
Figure 00000066
- логическая функция
Figure 00000063
.2. Functional structure of end-to-end transfer f 1 (←) i + 1 and f 2 (←) i conditionally “i + 1” and conditionally “i” bits “k” of the group of arguments of the multiplicable
Figure 00000046

preliminary adder
Figure 00000047
parallel to serial multiplier
Figure 00000048
is made in the form of two logical functions equivalent in structure to the conditionally “i + 1” category and “i” category, which include logical functions, respectively
Figure 00000063
,
Figure 00000064
as well as logical functions
Figure 00000051
,
Figure 00000052
,
Figure 00000053
,
Figure 00000054
and logical functions
Figure 00000055
,
Figure 00000056
,
Figure 00000057
accordingly, characterized in that the functional relationships of logical functions in end-to-end transfer structures
Figure 00000058
and
Figure 00000059
conditionally “i + 1” and conditionally “i” of bits “k” of the group are made in accordance with a mathematical model of the form
Figure 00000065

Where
Figure 00000066
- logical function
Figure 00000063
. 3. Функциональная структура сквозного переноса f1(←←)i+1 и f2(←←)i условно «i+1» и условно «i» разрядов «k» группы аргументов множимого
Figure 00000046

предварительного сумматора
Figure 00000047
параллельно-последовательного умножителя
Figure 00000048
, выполнена в виде двух эквивалентных по структуре логических функций условно «i+1» разряд и «i» разряд, которые включают соответственно логические функции
Figure 00000067
,
Figure 00000068
, отличающаяся тем, что в условно «i+1» разряд введены дополнительные логические функции
Figure 00000069
,
Figure 00000070
и
Figure 00000071
, а в условно «i» разряд введены дополнительные логические функции
Figure 00000072
и
Figure 00000073
, при этом функциональные связи логических функций в структурах сквозного переноса
Figure 00000058
и
Figure 00000059
условно «i+1» и условно «i» разрядов «k» группы выполнены в соответствии с математической моделью вида
Figure 00000074

где
Figure 00000075
- логическая функция
Figure 00000067
.3. Functional structure of end-to-end transfer f 1 (←) i + 1 and f 2 (←) i conditionally “i + 1” and conditionally “i” bits “k” of the group of arguments of the multiplicable
Figure 00000046

preliminary adder
Figure 00000047
parallel to serial multiplier
Figure 00000048
is made in the form of two logical functions equivalent in structure to the conditionally “i + 1” category and “i” category, which include logical functions, respectively
Figure 00000067
,
Figure 00000068
, characterized in that in the conditionally "i + 1" category introduced additional logical functions
Figure 00000069
,
Figure 00000070
and
Figure 00000071
, and in the conditionally “i” category additional logical functions are introduced
Figure 00000072
and
Figure 00000073
while functional relationships of logical functions in end-to-end transfer structures
Figure 00000058
and
Figure 00000059
conditionally “i + 1” and conditionally “i” of bits “k” of the group are made in accordance with a mathematical model of the form
Figure 00000074

Where
Figure 00000075
- logical function
Figure 00000067
. 4. Функциональная структура сквозного переноса
Figure 00000058
и
Figure 00000059
условно «i+1» и условно «i» разрядов «k» группы аргументов множимого
Figure 00000046

предварительного сумматора
Figure 00000047
параллельно-последовательного умножителя
Figure 00000048
, выполнена в виде двух эквивалентных по структуре логических функций условно «i+1» разряд и «i» разряд, которые включают соответственно логические функции
Figure 00000051
,
Figure 00000076
и
Figure 00000077
,
Figure 00000078
, отличающаяся тем, что в условно «i+1» разряд введены дополнительные логические функции
Figure 00000079
,
Figure 00000080
и
Figure 00000081
, а в условно «i» разряд введены дополнительные логические функции
Figure 00000082
и
Figure 00000083
, при этом функциональные связи логических функций в структурах сквозного переноса
Figure 00000058
и
Figure 00000059
условно «i+1» и условно «i» разрядов «k» группы выполнены в соответствии с математической моделью вида
Figure 00000084
4. Functional structure of end-to-end transfer
Figure 00000058
and
Figure 00000059
conditionally “i + 1” and conditionally “i” bits “k” of the group of arguments of the multiplicable
Figure 00000046

preliminary adder
Figure 00000047
parallel to serial multiplier
Figure 00000048
is made in the form of two logical functions equivalent in structure to the conditionally “i + 1” category and “i” category, which include logical functions, respectively
Figure 00000051
,
Figure 00000076
and
Figure 00000077
,
Figure 00000078
, characterized in that in the conditionally "i + 1" category introduced additional logical functions
Figure 00000079
,
Figure 00000080
and
Figure 00000081
, and in the conditionally “i” category additional logical functions are introduced
Figure 00000082
and
Figure 00000083
while functional relationships of logical functions in end-to-end transfer structures
Figure 00000058
and
Figure 00000059
conditionally “i + 1” and conditionally “i” of bits “k” of the group are made in accordance with a mathematical model of the form
Figure 00000084
 5. Функциональная структура сквозного переноса
Figure 00000058
и
Figure 00000059
условно «i+1» и условно «i» разрядов «k» группы аргументов множимого
Figure 00000046

предварительного сумматора
Figure 00000047
параллельно-последовательного умножителя
Figure 00000048
, выполнена в виде двух эквивалентных по структуре логических функций условно «i+1» разряд и «i» разряд, которые включают соответственно логические функции
Figure 00000063
и
Figure 00000085
, отличающаяся тем, что в условно «i+1» разряд введены дополнительные логические функции
Figure 00000086
,
Figure 00000087
,
Figure 00000088
и
Figure 00000089
, а в условно «i» разряд введены дополнительные логические функции
Figure 00000090
,
Figure 00000091

и
Figure 00000092
, при этом функциональные связи логических функций в структурах сквозного переноса
Figure 00000058
и
Figure 00000059
условно «i+1» и условно «i» разрядов «k» группы выполнены в соответствии с математической моделью вида
Figure 00000093
5. Functional structure of end-to-end transfer
Figure 00000058
and
Figure 00000059
conditionally “i + 1” and conditionally “i” bits “k” of the group of arguments of the multiplicable
Figure 00000046

preliminary adder
Figure 00000047
parallel to serial multiplier
Figure 00000048
is made in the form of two logical functions equivalent in structure to the conditionally “i + 1” category and “i” category, which include logical functions, respectively
Figure 00000063
and
Figure 00000085
, characterized in that in the conditionally "i + 1" category introduced additional logical functions
Figure 00000086
,
Figure 00000087
,
Figure 00000088
and
Figure 00000089
, and in the conditionally “i” category additional logical functions are introduced
Figure 00000090
,
Figure 00000091

and
Figure 00000092
while functional relationships of logical functions in end-to-end transfer structures
Figure 00000058
and
Figure 00000059
conditionally “i + 1” and conditionally “i” of bits “k” of the group are made in accordance with a mathematical model of the form
Figure 00000093
RU2010145099/08A 2010-11-03 2010-11-03 FUNCTIONAL STRUCTURE OF THROUGH CARRY f1(←←)i+1 AND f2(←←)i OF CONVENTIONALLY "i+1" AND CONVENTIONALLY "i" DIGITS OF "k" GROUP OF ARGUMENTS OF MULTIPLICAND [ni]f(2n) OF PRELIMINARY SUMMATOR fΣ([ni]&[ni,0]) OF PARALLEL SERIES MULTIPLIER fΣ(Σ) (VERSIONS) RU2445680C1 (en)

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Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SU1196852A1 (en) * 1984-04-10 1985-12-07 Московский Ордена Трудового Красного Знамени Инженерно-Физический Институт Unit for forming ripple-through carry in adder
US5600583A (en) * 1992-07-31 1997-02-04 Texas Instruments Incorporated Circuit and method for detecting if a sum of two multidigit numbers equals a third multidigit number prior to availability of the sum
EP1126613A2 (en) * 1993-09-02 2001-08-22 Xilinx, Inc. Logic structure and circuit for fast carry
RU2198421C2 (en) * 2000-09-28 2003-02-10 Акционерное общество открытого типа "НИИ молекулярной электроники и завод "Микрон" High-speed carry adding device

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
SU1196852A1 (en) * 1984-04-10 1985-12-07 Московский Ордена Трудового Красного Знамени Инженерно-Физический Институт Unit for forming ripple-through carry in adder
US5600583A (en) * 1992-07-31 1997-02-04 Texas Instruments Incorporated Circuit and method for detecting if a sum of two multidigit numbers equals a third multidigit number prior to availability of the sum
EP1126613A2 (en) * 1993-09-02 2001-08-22 Xilinx, Inc. Logic structure and circuit for fast carry
RU2198421C2 (en) * 2000-09-28 2003-02-10 Акционерное общество открытого типа "НИИ молекулярной электроники и завод "Микрон" High-speed carry adding device

Non-Patent Citations (1)

* Cited by examiner, † Cited by third party
Title
УЭЙКЕРЛИ Д. Проектирование цифровых устройств, т.1. - М.: Постмаркет, 2002, с.508, рис.5.91. *

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