SU1196421A1 - Device for determining ordinal numbers of electroplating apparatus baths - Google Patents

Abstract

1. A DEVICE FOR DETERMINING ORDER BATHROOM NUMBERS OF THE GALVANOAPPARAT containing i, made in the form of alternating copiers with direct and inverse code combinations of bath numbers, readout elements, two-input element OR pending multivibrator, reset circuit-n, i, i, i, two elements, or a waiting multivibrator, a reset circuit, n, i, i, two-input element, or a waiting multivibrator, a reset circuit, n, i, i, i A single register with direct outputs, (n + 1) -digit register with inverse outputs, a comparison circuit of two (n + 1) -bit numbers, two-bit counter and a trigger, characterized in that, in order to reduce hardware costs, energy consumption and increase protection, it is provided with (n + 1) input element OR, a front differentiating element, a shear differentiating element, a block of single short impulses, the outputs of the read elements are connected to the inputs of the (n + 1) input input OR with zero, first , ..., the n-th inputs of each of the (n + 1) -space dnpc registers, the output (l + 1) of the input circuit OR is connected to the input of a front-differentiating element and to the input of a differentiating element. the front of the element is connected to the first entrance d the analogue OR circuit, the output of the cut-off element is connected to the second input of the two-input circuit OR, the output of the two-input circuit OR is connected to the input of the continuous multivibrator, the output of the standby multi-vibrator is connected to the input of the trigger recording of the trigger, and the output of the dual-stage tuner is set and the source of the counter is set and the master set the master and the set of the counter. the trigger output, the forward trigger output is connected to the write enable input of (n + 1) -bit register, the inverse trigger output is connected to the write enable input of the second (n + 1) - bit register, zero, n, first, ..., n - register outputs are connected respectively to zero, first, ..., n - QoQO will give a comparison circuit of two (n + 1) o: bit numbers, output From the comparison circuit of two (n + 1) -digit numbers are connected to the first reset input on the counter, the output of the reset circuit is connected to the installation input on the trigger, the output of the reset circuit is connected to the second input input on the counter, output two-digit A single counter is connected to the input of a block of single short pulses. 2. A device according to claim 1, wherein the test is carried out so that between the direct and reverse code combinations of the copier of the current bath number and the copiers of the adjacent baths there is a copier with a zero code combination.

Description

The invention relates to coating equipment and can be used to control electroplating equipment. The purpose of the invention is to reduce power consumption and increase noise immunity. The drawing shows a block diagram of the device. The device contains baths Ij ,, 11 1 о f 1m of the galvanic device with numbers respectively zero, first, second, ..., tn-th, zones 2o, 2 ... zero: howl, first, 2 2. baths corresponding to the second. Zg, kono, sensors rear, 3, 3, ..., about 1 yes bath numbers; elements 4, 42, ... 4- match the code of the bath number code zero of the first, second, ..., O-th bits, respectively, copier 5 with the inverse value of the code of the number of a bath number, copier 6 with the direct value of the code of the bath number, a copier 7 with a zero value of the bath number code, (n + 1) -input element OR 8 differentiating along the front element 9 differentiating along the slice element 10 two-input element OR 11, waiting for multivibrator 12, reset circuit 13, (n + 1) -d discharge register 14 with direct outputs and a write enable input on the leading edge of the write pulse, (n + Ozdr dny register 15s are inverse and the outputs and the input resolution of the recording at the front of the recording pulse, trigger 16, (n + 1) bit size 19, circuit 17 comparing two (mt + 1) bit numbers two-bit counter 18, block 19 suppressing short single pulses. Number The sensors are determined by the formula p 8og-GG1, where m is the number of baths. Differentiating elements 9 and 10 5 THE LEADING multivibrator 12, reset circuit 13, (n + 1) -discharge registers 14 and 15, (n + 1) -dit Comparison circuit 17 and two-digit counter 1 can be constructed by known methods, as an (n + 1) -input circuit OR8, a two-input element AND And 11, a trigger 16, -. standard digital microcircuits can be used. As a block of suppression of short single pulses caused by a delay in the time of the elements to be squeezed out, a capacitance can act. C) which suppresses single sets of impulses caused by the delay of the times of the srashenshans of the elements: trigger 16 (which can be selected, for example, 155 TM2), register 14 (for which, for example, K 155 IR1 chip), comparison circuit 17 (for which, for example, K 155 W15 chips) can be used, for example. The delay is determined by the sum of the response times of the listed elements; for a total of the chips taken as an example, the delay is 125 not. For the 155 series Jgj.ixHO mA and OU, x.4.5 V microcircuits. With the indicated values of –out, capacitance c can be chosen equal to 1000 pF. The outputs of the elements 4o, 4 ,,, 42, ..., 4j, readings are connected to zero, first, second, ..., information inputs of registers 14 and 15 and inputs (n + 1) -input circuit OR 8. Output circuit IC connected to the inputs of differentiating elements 9 and 10. The output of differentiating element 9 is connected to the first input of the OR circuit 11, the code of the differentiating element 10 is connected to the second input of the OR circuit 11, whose code is connected to the input of the multivibrator 12, the output of the latter is connected to the trigger recording input of the trigger 16 and with counting input of two-digit counter 18, zero the first, second, ..., nth outputs of register 14 are connected respectively to zero, first, second, ..., inputs of the first comparison number 17 comparison, zero, first, second, and output outputs of register 15 are connected respectively to zero, first, second, second, and second inputs of the second comparative number of the comparison circuit 17, the code of which is connected to the first reset input in O of the counter 18. The first reset circuit of the reset circuit 13 is connected to the installation input of the trigger 16, the second code of the reset circuit 13 is connected with the second reset input in About counter 18, inverse trigger code 16 s one with the write enable input of register 15 and a data input of flip-flop 16, forward vkod flop 16 is connected to an input write enable register 14, vkod two-bit counter 18 is connected to the input unit 19, suppressing the short

3,

single pulses, the signal 20 from block 19 for suppressing short single pulses is a signal that indicates a fault in the 4p circuit elements. f readout or in the circuit with the device, the signals 21o, 2.2, ..., 21 from the outputs of register 14 are the direct code of the bath number.

The device works as follows.

When the power is turned on, the reset circuit 13 generates a reset signal in the O of the trigger 16 and the counter 18. Further proper operation of the circuit is provided when the auto operator is installed with 4p, 4, f elements, ... i4 | read to the position in which they read the inverse code of the bath number. When the auto operator starts to move at the moment of changing the readable code from the inverse to zero differential signal from elements 4 (j, 4,4, ..., 4 reads go to the OR 8 circuit, from the output of the last one the differential goes to differentiating - elements 9 and 10. In this case, the signal differential from the level of logical zero to the level of logical unit is differentiated by element 9, - and the positive voltage pulse arrives at the first input of the OR circuit 11. The signal difference from the level of logical unit to logical zero level is differentiated by element 10, and the polarizer The voltage pulse arrives at the second input of the OR circuit 11. The output of the last pulse produces a positive voltage pulse, the front of which starts the standby multivibrator 12. The pulse width of the standby multivibrator 12 is chosen longer than the sum of the duration of the transients caused by the non-simultaneous operation of 4p, 4 elements, f, ..., 4p readout and travel time by a copier auto-operator with a zero code combination 7, whose width is less than the width of information copiers 5 and 6.

At the end of the pulse generated by the waiting multivibrator 12, the voltage drop from the logical zero level to the level of the logical unit, falling on the recording input, causes a trigger to trigger 16 units. Differential voltage at the direct output of the trigger 16 of the uroavn logi96421

zero to the level of a logical unit allows writing in register 14 of the direct code of the bath number Ip,. .., 1. Since an arbitrary code is recorded in register 15 when the power is turned on, circuit 17 compares the signal with a logic zero level, which corresponds to the inequality of the two codes applied to its inputs. By

At the end of the pulse, driven by the waiting multivibrator 12, the voltage drop from the logic level zero to the level of the logical unit, falling on the counting input of a two-digit counter 5 chica 18, causes an entry in the unit counter 18. A signal with a logic zero level from the comparison circuit 17 arriving at. The first reset input, in O, the counter 18, does not cause a reset of the 2Q counter in O. At the output of the zero, first, second, and nth bits of the register 14, there is a direct code of the bath number, in the zone of which the auto operator is currently located. Signal

25 20 faults of the 4o, 4, ..., 4p, 4p readout elements, removed from the input of the suppression unit 19, corresponding to the entry in the counter 18 of two pulses, have a logic level

2p zero,

Upon further movement of the auto-operator along the line in time of changing the code removed from elements 4о, 4., 4 ,, ..., f read from zero to inverse, part of the circuit including elements 9 and 10 of the circuit OR 8 and 11 and the waiting multivibrator 12 works the same as described, however, the voltage drop from the logical level of 40 l to the level of the logical unit at the output of the waiting multivibrator 12., causes the write O to the trigger 16. A positive voltage drop on the inverse output of the trigger 16 causes the writing of the inverse code on the inputs of the registers 14 and 15 in regis EXAMPLE 15 The presence of reliable information on the inputs of the registers 14 and 15 is provided by the duration of the multivibrator impul50 meat selected from the noted conditions. The signal drop from the logical zero level to the level of the logical unit, generated by the waiting multivibrator 12, goes 55 to the counting input of the counter 18, writing to the counter 18 of the two. The signal with the level of the logical unit produced by the comparison circuit 17, po5.

A step at the reset input to O of counter 18 causes the counter of 18 to be reset to O. At the output of counter 18, a pulse of positive polarity appears, the duration of which depends on the switching time of the flip-flop 16, writing the code to register 14 and the time of comparing two (n +. 1) -digital numbers by comparison circuit 17. This short pulse is suppressed by the suppression unit 19 and the signal 20 is not released.

If one or several elements 4 fail (s, 4, 4, ..., 4 read codes are straight and inverted by register 15, the codes are not equal to each other by at least two steps. In this case, the signal from the output of the comparison circuit 17 is equal to the logic level zero and does not reset the counter 18, and in this case, a two is written to the counter 18. According to the described algorithm, a constant level of the logical unit appears through the block 18, which, after a block of suppression of single short pulses, appears at the output of the device, the indicator is faulty The state of the 4,4,44, ..., 4 read elements or their communication circuits with the control device.

The use of the proposed device for determining the serial numbers of galvanic apparatus baths with diagnostics of sensor circuits makes it possible to reduce the number of blocks, which leads to a reduction in power consumption and increases the noise immunity of the circuits of readout elements due to masking (absorption) of a part of single interferences occurring in these circuits. The device has appeared964216

The introduction of single impulse noises | In some bits of a code combination containing the number of logical units more than one, the mask is scrolled on the (h + 1) input circuit of 1 SHI by units of other bits. So, for example, with code combinations 0101, 1100, 0110, etc. the appearance of a single impulse noise, i.e. 10 the occurrence or disappearance of a logical unit in one of the bits of the proposed combinations does not lead to the appearance of a signal drop from the output of the OR circuit, since the 15 remaining units prohibit the occurrence of a signal drop from the output of the OR circuit 8.

So, with a 5-bit code combination, the device masks 82%. possible situations of the occurrence of single impulse noise, which does not lead to a false occurrence of the fault signal of 4, 4, 4-, ..., 4 readout elements or their connection circuits with the device. With an increase in the length of the code combination, this percentage increases.

Thus, a positive effect when using the proposed device for determining the serial numbers of the baths of the galvanic apparatus with diagnostics of the circuits of the readout elements is achieved by reducing the hardware costs and power consumption, increasing the noise immunity and performance of the galvanic line by eliminating downtime of the galvanic line when a single impulse noise occurs. chains of readout elements.

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Claims (2)

1. DEVICE FOR DEFINITION-j NII OF ORDER NUMBERS OF A VALVE BATHROOM, containing sensors made in the form of alternating copiers with direct and inverse code combinations of bath numbers, readout elements, two-input OR element, waiting multivibrator, reset-discharge circuit, (n + 1 register with direct outputs, (n + 1) -bit register with inverse outputs, a circuit for comparing two (n +1) -bit numbers, two-bit Counter and trigger, characterized in that, in order to reduce hardware costs, power consumption and increase noise interference In addition, it is equipped with an (n + 1) -input OR element, a front differentiating element, a slice differentiating element, a unit for suppressing single short pulses, and the outputs of the readout elements are connected to the inputs of the (n + 1) -input OR circuit with zero, first , ... ”by the nth inputs of each of the (n + 1) -bit registers, the output (n + 1) of the input OR circuit is connected to the input of the differentiating element along the front and to the input of the differentiating element. the front of the element is connected to the first input of the two-input circuit we are OR, the output of the differentiating slice element is connected to the second input of the two-input circuit OR, the output of the two-input circuit OR is connected to the input of the standby multivibrator, the output of the standby multivibrator is connected to the trigger enable input and to the counting input of the two-bit counter, the information input of the trigger is connected to the inverse trigger output, the direct output of the trigger is connected to the write enable input of the (n + 1) -bit register, the inverse trigger output is connected to the write enable input of the second (n + 1) -bit register, well eve, first, ..., ηth outputs of the registers are connected respectively to the zero, first, ..., nth inputs of the circuit for comparing two (n + 1) bit numbers, the output from the circuit for comparing two (n + 1) - bit numbers are connected to the first reset input at 0 counter, the output of the reset circuit is connected to the installation input at 0 of the trigger, the output of the reset circuit is connected to the second reset input at 0 count-. ka, the output of a two-digit counter is connected to the input of the unit for suppressing single short pulses. 2. The device according to p. ^ Characterized in that between the direct and reverse code combinations of the copier of the current bath number and the copiers of adjacent baths, there is a copier with zero code combination. SU .1196421