SU1177805A1 - Pulse distributor - Google Patents

Description

The invention relates to the field of computing and can be used in various automation devices and computing. ;

The aim of the invention is to improve the reliability of the distributor by eliminating the possibility of the appearance of spurious inputs.

FIG. Figure 1 shows the functional diagram of the pulse distributor; in fig. 2 - time diagrams of the operation of the impulse distributor * at 16 outputs.

Pulse distributor- contains, master oscillator 1, counter 2, decoder 3, register 4, group 5 decoders, input 6 of the initial installation, input 7 of start of the pulse distributor, group 8 outputs of the pulse distributor.

The pulse distributor operates as follows.

The input 6 of the initial installation of the pulse distributor receives 2 pulse initial installation, having a duration sufficient to set the counter 2 and register 4 to its original state.

After that, upon the arrival of the signal _{3 of the} launch of the device at the input 7, the generator 1 begins to generate high-frequency pulses. These signals go to counter 2 and register 4,

moreover, on the leading edge of the clock pulse of the program: there is a change in the contents of counter 2 per unit, and on the trailing edge of the clock pulse, the information coming from the first group of discharge outputs of counter 2 and from the outputs of the decoder 3 is written to the register 4. counter 2 and decoder 3. At the Inputs of all decoders of group 5, a binary combination will be set corresponding to one of the decoder group 5 inputs. Which decoder of group 5 will work and the trace tionary on which of the outputs will be pulse distributor signal defines binary combination that is set to the second group of register outputs 4. By the arrival of each new clock pulse output signal appears successively for each of the pulse distributor outputs.

On the leading edge of the first signal coming from the generator 1, there is an increase in the content of the counter 2 by one, on the rear. the front of this signal is recording a new binary combination in register 4, after which the signal of a logical unit will appear on the next. output pulse distributor.

Φνι.ί

1177805

FIG. 2

Claims (2)

PULSE DISTRIBUTOR containing a master oscillator, a counter, a decoder, the master oscillator output being connected to a counter meter input, characterized in that, in order to increase reliability by eliminating the possibility of spurious input signals, the decoder group and the trigger input are entered the distributor is connected to the control input of the master oscillator, the output of which is connected to the register clock, the installation input of which is connected to the installation input of the counter and the installation input of the pulse distributor, the first group of outputs of the counter is connected to the first group of information inputs of the register, the second group of information inputs of which is connected to the group outputs of the decoder, the group of information inputs of which is connected to the second group of outputs of the counter, the first group of outputs of the register of the connection inen with groups of information inputs of the group decoders, the gate inputs of which are connected respectively to the outputs of the second register group, the outputs of the group decoders are respectively group 1 Dispenser Outputs Impuys. zi 117780 one 1177805 2