SU115943A1 - Electronic binary counter of electrical pulses, for example, for digital computers or digital automatic control systems - Google Patents

Description

Electronic binary electrical pulse counters are known for digital computers or digital automatic control systems based on dynamic triggers. These meters have the disadvantage that they can only lead in one direction, and therefore they are unsuitable for some devices, for example, digital integrators, digital tracking systems, etc., that need counters that produce the bill as in and in the opposite direction.

The described counter eliminates this disadvantage and allows counting both in the forward (pulse addition) and in the reverse (pulse subtraction) directions, which is achieved by its new scheme.

According to this scheme, the input of each trigger is connected via a delay line to one of the valve inputs connected via separation circuits to the input of electrical pulses and through the separation circuits and to the delay line to the output of the previous counter cascade in the circuit that connects the valve output to the input trigger previous cascade counter through the delay line. In this case, the second input of the clan of each digit of the counter is connected to the grid of the corresponding trigger and a control valve is turned on in the circuit connecting the input of pulses to all bits of the counter (except the first one), which reverses the count.

The drawing shows a schematic diagram of the counter.

The circuit includes: DT dynamic triggers, inputs

U1 and UO control trigger circuits for setting codes 1 and 0; the outputs C are the trigger lamp grids associated with the capacitor of the trigger storage element; GI inputs from the high-frequency pulse generator, creating a sequence at the output of the dynamic trigger

 115943

pulses when operating in U / mode; valves / Ci ... D „(device matching); elements 3 for delaying the pulse line pa by time / s; control valve BI ... BJ, and Bz ... V - -r. of circuit separation rectifiers. When counting in the forward direction, a voltage is applied to the input of the control valve B from the output of the control trigger, thereby locking the gate of the dynamic counter.

The first impulse arriving at the input of the counter goes to valve K, which is in a closed state due to the low voltage level of the trigger grid and therefore does not pass the first impulse to its output C. After a time t, the first impulse reaches input V / the trigger and triggers the latter, with the voltage on the trigger grid increasing, and pulses are passed into its output circuit. Trigger No. 1 fixes code 1. The remaining bits of the counter do not receive trigger pulses and remain at position 0.

The second pulse arriving at the input of the counter is immediately passed by valve K, since the second input of the last has a high level of grid voltage of trigger No. 1. After a time t, this pulse, passed to the input of trigger / trigger No. 1, only confirms the presence of code 1 , and after the time passed to the input O O, the trigger JMb 1 is quenched, fixing the position 0. The transfer pulse coming from the time to the input Kg. Trigger No. 1 will not be missed, since trigger No. 2 is in the O position, but after time 4 / s, the transfer impulse reaches the entrance U1 of trigger No. 2 and transfers th, fixing the position 1. Thus, the counter 10 captures the code after the arrival of the second pulse (r. f. 2).

The introduction of delay lines slows down the response time of a dynamic counter in the worst case: pa value (3, j-2) / 3, where is the number of cells, and the delay time of the pulse by the delay line.

When counting in the opposite direction, a pulse must be applied to the control trigger input, thus opening the control valve B. Now the pulses arriving at the counter input are fed to the trigger inputs via Bi ... B rectifiers, which serve to separate the counter circuits. The first impulse through time t overturns all the trigger cells (No. 1, 2, 3, 4 ... No. n), fixing the code 1111 ... 1, that is, the unit recorded in the additional code. The transfer pulses do not occur at this, since the valves Ki ... K „are closed.

The second pulse, at time ts, confirms the state of the flip-flops at position 1, and after time 2/3, flushes the trigger readings to O, fixing the code O in all the bits of the counter. However, after a time equal to 4g, the triggers Nos. 2, 3 and 4 are again put into position 1 by transfer pulses from the JMb 1, 2 and 3 flip-flops, and the transfer pulses coming to the valves Kg, Cs and K will not be missed and, therefore, they will not make an error in the work of the counter- Thus, after the arrival of the second pulse, the counter records code 2 (1110).

Subject invention

An electronic binary counter of electrical pulses, for example, for digital computers or digital automatic control systems, built on dynamic triggers, characterized in that, in order to be able to reverse the counting direction, the input of each trigger is connected via a delay line to one of the valve inputs, connected through separation circuits with the input of electric pulses and through the separation circuit and the delay line - with the output of the previous stage of the counter, located in