SU148595A1 - Binary counter - Google Patents

Description

Binary counters are known in which there is no consistent distribution of transfer units consisting of potential logic circuits and flip-flops.

The proposed binary counter is characterized in that, in order to increase its reliability, two trigger registers are used in it: the main and the auxiliary. The outputs of the main register are connected to the inputs of the auxiliary via logic circuits designed to enter into the auxiliary register a number larger than the main ones, and the outputs of the auxiliary register are connected to the inputs of the main register through census gates, the second inputs of which are connected to the input devices.

To reduce the number of equipment in the counter, the registers are divided into groups, the control inputs of which are connected to the command triggers, and the input of the command trigger through the h circuit is connected to the zero outputs of the triggers of the auxiliary register of the previous group.

FIG. 1 shows a functional diagram of one group of bits of the counter being described; in fig. 2 is a diagram of a counter of m groups.

The described binary counter consists of a main register / and auxiliary register P, a command trigger ///, and a quench trigger IV. In the interval between the counting pulses in the auxiliary register // a number is set, one is greater than the number of / (for the counted pulses, i.e., the number K. + L) Logic circuits (where n is the number of counter bits) serve to implement this logic of the counter. connected between the main outputs and the inputs of the auxiliary register. An incoming counting pulse (input 2) goes immediately to all bits of the register // and includes feedback in its elements. At the same time, the state of the register // is recorded for the period of information transfer from register // to about main register / through vein Nos. 148595- 2 or 3-3 of the census, the second inputs of which receive a signal from a single output of a command trigger /// at the moment of transmission. into the register //. The trigger IV of quenching, also triggered by the counting pulse, issues a command to damp the main register, thereby breaking the feedback in its elements. When the counting pulse in the register // terminates, the feedback is broken and the number K + 2 is established,

Thus, by the time of arrival of the next counting pulse, in the main register / there is information corresponding to the number K + 1, previously received pulses, and in the auxiliary register // the number K.-1r2. With this construction of the counter circuit, with a large number of bits, the number logic circuits / .1п, intended, as indicated, to enter into the auxiliary register a number one greater than the number in the main register. Therefore, in the described counter, the registers are divided into tons of similar groups of 4-5 bits each, the control inputs of which are connected to command triggers III .film. The input of each command trigger through the h 4 circuit is connected to the zero outputs of the auxiliary register triggers (// - /// п) of the previous group. With this logic, the counting pulse to the next (second) group is transmitted only when there are zeros in all bits of the first group of the auxiliary register. If the command trigger of the second group did not work, then the triggers of the registers of the second group do not respond to the pass-through quench command from the /// quench trigger, common to all groups of the counter, along the board 5.

Similarly, the transfer to the third group will occur only if there are zeros in all the bits of the auxiliary registers of the first and second groups.

The described binary counter is highly reliable, since it does not use triggers with a counting input.

Subject invention

Claims (2)

1. A binary counter, in which there is no consistent distribution of transfer units, consisting of potential logic circuits and triggers, characterized in that, in order to increase reliability, it uses two trigger registers: the main and auxiliary, the outputs of the main register are connected to the inputs of the auxiliary through logic circuits intended for recording in the auxiliary register a number one greater than the main one, and the outputs of the auxiliary register are connected to the main inputs through a vent whether census second inputs are connected to the output command trigger, connected to the input device. 2. A binary counter according to claim 1, characterized in that, in order to reduce the amount of equipment in it, the registers are divided into groups, the control inputs of which are connected to command triggers, the input of command trigger through circuit h is connected to zero outputs of triggers of the auxiliary register of the previous group.