SU1129645A1 - Device for determining critical situation state - Google Patents

Abstract

A DEVICE FOR DETERMINING A CRITICAL SITUATION CONDITION, comprising a sensor block, a register whose outputs are connected to the inputs of the first memory block and are a group of device outputs, a second memory block, the first group of outputs of which is connected to the first group of register inputs, first, second and third elements I, the first element IL, which is different from the fact that, with whole improvements in the functional reliability of the device, an initial code setting block, a pulse counter, a multiplexer, a delay element, a pulse generator are introduced into it c, the second OR element, the output of the second block; the memory is connected to the first input of the first OR element, the output of which is connected to the first input of the first AND element and to the first input of the second AND element, the output of which is connected to the first input of the second OR element, the second input of which connected to the first input of the register and is the control input of the device, the output of the second element OR is connected to the first input of the pulse counter, the outputs of which are connected to the inputs of the second memory unit, the second group of outputs to torogo connected to the first group of inputs of the multiplexer, the outputs of the sensor unit are connected to the inputs of the second group. multiplexer, the output of which is connected to the second input of the first element OR and to the first input of the third element AND whose output is connected to the second input of the register and is the output of the device, the outputs of the initial code specifier unit are connected to the second group of inputs of the register, the output of the pulse generator is connected to the second the inputs of the first, second and third elements And, the outputs of the first memory block are connected to a group of inputs of the pulse counter, the output of the first element And is connected to the second input of the pulse counter.

Description

The invention relates to means of automatic control, monitoring and signaling of complex technical systems, in particular aircraft, and can be used to increase the safety of their operation in critical situations (CS) that have several significant states.

A device for determining the state of a critical situation is known, which contains a set of sensors and a register whose outputs are the outputs of device L.

This device does not provide control of individual states of development of a critical situation.

The closest in technical essence to the invention is a device for determining the critical situation, comprising a sensor unit, the register whose outputs are connected to the inputs of the first memory element I are the device output group, the second memory element the first group of outputs of which is connected to the first group of inputs of the register is the first, second and third elements AND, the first and second elements OR 2J.

This device monitors the development of a critical situation. At each time, the device generates a code for the current state of the critical situation. However, it is impossible in the device to simultaneously trigger two or several sensors that were not unblocked in this state. When several sensors are simultaneously triggered, the device generates an incorrect code for the current state of the critical situation due to the overlapping of codes corresponding to the sensors that have been activated.

The purpose of the invention is to increase the functional reliability of the device by ensuring proper operation while simultaneously operating several sensors.

The goal is achieved in that a device for determining the state of a critical situation, comprising a sensor unit, a register whose outputs are connected to the inputs of the first memory block and are a group of device outputs of a second memory block, the first group of outputs of which is connected to the first group of inputs of the register , first, second And third elements And, first element

OR, the initial code setting block, pulse counter, multiplexer, delay element, pulse generator, second OR element, the output of the second memory block are connected to the first input of the first OR element, and the output of which is connected to the first the input of the second element AND, the output of which is connected to the first input of the second element OR, the second input of which is connected to the first input of the register and is the control input of the device, the output of the second element OR through the delay element connected to the first One pulse counter, the outputs of which are connected to the inputs of the second memory block, the second group of outputs of which is connected to the first group of multiplexer inputs, the outputs of the sensor unit are connected to the second group of inputs of the multiplexer, the output of which is connected to the second input of the first OR element and to the first input of the third element And, the output of which is connected to the second input of the register and is an input. the device, the outputs of the initial code setting block are connected to the second group of register inputs, the output of the pulse generator is connected to the second inputs of the first, second and third elements AND, the outputs of the first memory block are connected to the group of inputs of the pulse counter, the output of the first element I is connected to the second input of the counter pulses.

FIG. 1 is a functional block diagram of the device for determining the state of a critical situation; FIG. 2 - time diagrams of the device operation.

The device for determining the state of the critical situation contains a block of 1 sensors, a register 2, the first and second blocks 3 and 4 of memory, the first element 5 OR, the first and second elements AND 6 and 7, the second element 8 OR, the third element 9 And, the generator 10 pulses, the block 11 sets the start code, the multiplexer 12, the delay element 13, the counter 14 pulses.

FIG. 2 shows the temporary jjHarpaMMa operation of the device in three modes: a, 8, b. The coordinate axes in the diagram, denoted by letter indices, characterize the shape of the pulses at the following points: b

at the output of the generator 10 pulses

 at the output of the multiplexer 12,

 - at the output of the second memory block 4

Q - at the output of the second element 7 And

7, - at the output of the element 13

ki, S - at the output of the first element

6 I.

The initial code setting unit 11 is designed to store the initial state code of the device.

The multiplexer 12 switches the sensor signals from the sensor block 5 in accordance with the address received from the information output of the second group of the second memory block 4.

The delay element 13 is necessary for consistently rewriting the code from the first memory block 3 to the counter 14 pulses.

The 10-clock pulse generator synchronizes the operation of the device.

The device works as follows.

When the device is turned on by a signal from the device installation input to the initial state, register 2 records the initial code; it is stored in the initial setting code unit 11, which is fed to the inputs of the first memory block 3. At the outputs of block 3, the code of the beginning of the list of adjacent states, to which transition from the current state is possible, is detected and fed to the inputs of the counter 14 pulses. The signal from the device installation input to the initial state comes with a certain delay to the control input device. pulses counter 1, bringing it back to its original state. When signals are received at the control counting input of the pulse counter 14, its output code, which enters the inputs of memory block 4, changes. With the help of codes from the information outputs of the second group of the second memory element to the address inputs of the multiplexer 12, the corresponding sensors. The next state code comes from the informational outputs of the first group of the second memory block 4 to the information inputs of the first group of register 2.

Consider three cases of device operation: the transition is not detected (Fig. 2c); a transition is detected (Fig. 2b, a sequence of transitions is detected (Fig. 26).

In the first case, if the signal is M from the output, the multiplexer is O (i.e., no transition to the new state is detected), and the signal from the output of the second memory element is O (i.e. the list is not viewed to the end), the signal About from the output of the second block-4 memory through the circuit of element 5 OR - element

6I (upon receipt of a clock pulse from the generator 10 clock pulses; pulses) is fed to the control counting input of the counter 14 pulses. At the output of this counter, a trace state code is generated from a list of adjacent states, according to which a trace of the trace sensor is polled.

If М О (transition is not detected); V 1 (end of list), signal O from the start of the second memory block through the circuit element 5 OR - element

7I (upon receipt of a clock pulse) - element 8 OR - delay element 13 arrives at the control input of setting the pulse counter 14 The operation of the device is repeated for the same list of adjacent states.

In the second case, M 1 (transition detected); V o or 1.

The signal 1 from the output of the multiplexer 12 through element 9 I (when a clock pulse is received) is fed to the input of the record of register 2. By this signal, the new state code from the information outputs of the first group of the second memory block 4 is written into register 2.

In the third case (a sequence of transitions is detected), when a transition to the next state is met in the new state, etc., a 1 appears at the output of multiplexer 12, and when these signals arrive through element 9 AND The corresponding codes of the new states are written to the input of the register 2 record until the final residual state is reached,

The outputs of register 2 are the information outputs of the device. The current status code recorded in register 2 can be used in the alarm system to notify the operator of a change in the state of the situation or whether the system automatically controls to switch the operating mode according to the changed state. The signal from the output of element 9 And can be used as a control signal of the fact of a state change. 11 5 The technical advantages of this device are to increase its functional reliability associated with the prevention of issuing false commands while simultaneously triggering several sensors, which characterize the moment of a state of critical situations.

Original

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Claims (1)

DEVICE FOR DETERMINING THE CRITICAL SITUATION CONDITION, comprising a sensor unit, a register whose outputs are connected to the inputs of the first memory unit and are a group of device outputs, a second memory unit, the first group of outputs of which is connected to the first group of register inputs, the first, second and third elements AND, the first OR element, characterized in that, with a whole increase in the functional reliability of the device, a block for setting the initial code, a pulse counter, a multiplexer, a delay element, and a pulse generator are introduced into it the second OR element, the output of the second memory unit is connected to the first input of the first OR element, the output of which is connected to the first input of the first AND element and to the first input of the second AND element, the output of which is connected to the first input of the second OR element, the second input of which is connected to the first input of the register is the control input of the device, the output of the second OR element through the delay element 'is connected to the first input of the pulse counter, the outputs of which are connected to the inputs of the second memory block, the second group of outputs of which is directed to the first group of multiplexer inputs, the outputs of the sensor block are connected to the second group of multiplexer inputs, the output of which is connected to the second input of the first OR element and to the first input of the third AND element, the output of which is connected to the second input of the register and is the device output, the outputs of the initial setting unit the code is connected to the second group of inputs of the register, the output of the pulse generator is connected to the second inputs of the first, second and third elements AND, the outputs of the first memory block are connected to the group of inputs of the counter imp lsov, the output of the first AND element is connected to the second input of the pulse counter. n „1129645 1 1129645