SU1070712A1 - Device for diagnosing multi-channel systems with redundancy - Google Patents

Abstract

1. A DEVICE FOR THE DIAGNOSIS OF MULTI-CHANNEL RESERVED SYSTEMS, containing, by the number of channels, k, the bit buses, which are the first inputs of the device. and an analysis unit, the output of which is the output of the device, characterized in that, in order to increase reliability and simplification, it contains kn-match match blocks, an OR element and a n-bit counter, the input of which is connected to the second input of the device, and the outputs with the first inputs of the matching blocks and the first inputs of the analysis block, the second inputs of each matching block are connected to the outputs of the same name all; channels, the outputs of the matching blocks are connected to the inputs of the OR element, the output of which is connected to the second input of the analysis unit ..

Description

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2, The device according to claim 1, about tl and that the analysis unit contains a decoder and a group of gates, the first inputs of which are connected to the corresponding outputs

the decoder, the second input with the second input of the block, and the output with the output of the block, the input of the decoder is connected to the first input of the block.

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The device relates to computing and can be used in multi-bit redundant systems to diagnose their condition and identify the source of the error.

A device is known that allows a reliable result to be implemented by a majority principle in a multichannel redundant computing system Cl.

The disadvantage of such a device. It is impossible to determine the source of unreliable information.

The closest in technical essence to the invention is a device containing input buses and an analysis unit that allows determining the source of error in one bit of a three-channel redundant G2 system. The drawbacks of the device are large hardware costs and limited scope. The latter is due to the fact that the device can only be used in a three-channel reserved system. Most hardware costs are due to the fact that, with an increase in the number of bits in the same number of times, the number of analysis blocks, which are relatively complex nodes, increases.

The purpose of the invention is to enhance. reliability and simplification of the device.

To achieve this goal, a device for diagnosing multichannel redundant systems, containing the number of channels rck bit buses, which are the first inputs of the device, and the analysis unit whose output is the output of the device contains 1c-bit matching blocks, the element OR, and a bit counter, the input of which is connected to the second input of the device, and the outputs to the first inputs of the matching blocks and the first inputs of the analysis unit, the second inputs of each matching block are connected to the outputs of the same name and all channels., the outputs of the blocks are the same and are connected to the inputs of the OR element, the output of which is connected to the second input of the analysis unit.

The analysis block contains a decoder and a group of valves, the first inputs of which are connected to the corresponding outputs of the decoder, the second 5 input - with the second input of the block, and the output - with the output of the block, the input of the decoder is connected to the first input of the block.

In the prototype, to determine the source of error, a decoder is used, executed on AND elements, and the presence of a unit at the output of each AND element corresponds to a certain error situation,

5 for example:,,. The number of inputs for the elements And is equal to the number of channels of the redundant system, the number of elements And is equal to the number of diagnosed occult situations, and the number of analysis is equal to the input bus width. In the proposed device. the counter sequentially enumerates all possible situations at once in the redundant system: from 00 ... 00 - all are healthy;

00 ... 01 - the last channel is faulty before 11, ... 11 - all are healthy. Each match block compares the code in its bit of all channels.

30 with content counter. When

the match unit analyzes the signal corresponding to the current code on the counter to the output of the device. Match blocks are

35 simpler nodes than the analysis units, and therefore, with a large number of channels and bits in a redundant system, hardware costs are reduced, and this increases the reliability of the device.

Figure 1 shows the block diagram of the device; 2 is a match block.

Device: Fig. 1) contains 45 p-bit counter 1, block 2 coincidence, element OR 3, decoder group of gates 5, block 6 of analysis, input 7 of the counter from the pulse generator, outputs 8 blocks coinciding 50, bus .9 one bit yes all channels, input 10 resolution, input 1c-bit buses 11 from the n-channels.

 Block 2 matches (Figure 2) contains the elements And 12-14, the element 15 match, the element OR 16, the element NOT 17.

Counter 1 is intended for sequential enumeration of all possible situations in a single bit of a g-channel redundant system. Blocks 2 matches are designed to compare the code on the counter 1 with the codes on the tires 9, i.e. The i-th matching block compares the code on the counter with the code on i-OM. The size of all channels and outputs signal 8 in case of a match. If all bits of counter 1 match the code on bus 9, i.e. at the output of all elements 15 of the match - one, then at the output of the element AND 16 the signal turns on The element OR 3 (Fig. 1) provides a signal, permission to input 10 in the presence of at least one signal at the output 8.,

The decoder 4 is designed to generate an error signal corresponding to the current code on the counter 1. In the case of an n-channel system, a decoder is assigned a value in accordance with the accepted situation assessment ideology. For example, in the six-channel A1 ... system, the value 001111 can be assigned to the code error A1 and A2, and code 000111 - a conflict situation that requires additional analysis.

The valve group 5 is designed to transmit an error signal from the decoder 4 to the output of the analysis unit 6 in the presence of a coincidence signal at the output 10.

The device works as follows.

Counter 1 sequentially enumerates all possible code combinations in one oazr of a de-channel redundant system, and decoder 4 converts these codes into signals of corresponding errors. The input of block 2 of the match is the code from counter 1 and the code of one of the bits from all i-channels. The appearance of a signal at output 8 indicates that the code on the counter coincided with the code of this bit. This signal, pass through the element OR 3, permits the passage of an error signal from the output of the deschinorator 4 through the valve group 5 to the output of the device. As a result, for the full cycle of the counter, all possible 2n code combinations will be enumerated on the same bits of the redundant system and its state will be fully determined.

Consider the operation of the device on the example of a three-channel four-bit system. To diagnose it, a three-bit counter 1, four blocks 2 matches, a four-input element OR 3, a decoder 4 will be required, a full decoder for three inputs can be used as a koToporo, and a valve group .5 of eight 2 elements I.

The outputs of the decoder 4 are uniquely associated with a specific type of fault, for example A (code 100), a fault of the first channel (transition from O to 1). The appearance of signal 10 indicates that a situation has arisen in one of the bits of the system being diagnosed, the same as on the counter, and therefore this signal from the decoder can pass to the output of the device.

Let the system state follow. MORE:

The counter is in the initial state - 000. The input of the block 2 of the first bit coincidence is received

0 code from counter 000 and code from the first bits of all three channels - 111. No match occurs. At the input of block 2 of the second bit coincidence, the same code arrives from the counter and

5, the value of the second bit of all channels is 000. A coincidence occurs, resulting in a signal 8 from this block 2. match, the element OR 3 is passed, opens the valve group 5 and passes the signal

AO with a decoder (code 000), which

testifies to the correct operation of the system being diagnosed. A similar picture will be observed with the third category. Code from the fourth

bit - 001 does not match the counter code. After the arrival of the signal at input 7, the counter enters state 001. In this case, only the fourth block of matches coincides with the codes. As a result, the way is open to signal A. (code 001), indicating the failure of the third channel (transition from O to 1). Subsequent codes on the counter are not

i coincide with codes in bits

Claims (2)

1. DEVICE FOR DIAGNOSIS OF MULTI-CHANNEL RESERVED SYSTEMS, containing the number of channels nk ^ bit buses, which are the first inputs of the device, 070712 and an analysis unit, the output of which is the output of the device, characterized in that, in order to increase reliability and simplification, it contains K η -bit matching blocks, an OR element, and an η-bit counter, the input of which is connected to the second input of the device, and the outputs - with the first inputs of the matching blocks and the first inputs of the analysis block, the second inputs of each matching block are connected to the outputs of the same category of all ^ channels, the outputs of the matching blocks are connected to the inputs of the OR element, the output of which is with the second input ₍ analysis block. ι 2. The device according to p. connected to the first input of the block.