SU1058076A1 - Digital frequency synthesizer - Google Patents

Abstract

A DIGITAL FREQUENCY SYNTHESIZER containing ring-tunable oscillators, the first frequency divider with a fixed division factor, the first frequency divider with a variable division factor, the first pulse-phase detector and the first low-pass filter, and the series-connected second frequency divider with a variable division factor, the second pulse-phase detector and high-pass filter, the output of which is connected to another input of a tunable generator, as well as successively soy An in-line reference oscillator and a second frequency divider with a fixed division factor, the output of which is connected to the second inputs of the first and second pulse-phase detectors, characterized in that, in order to increase the phase stability of the output oscillations, between the output of the tunable oscillator and the input of the second frequency divider with neper The amplitude detector, the second low-pass filter, the trigger and the key are entered in series by the division factor, and the split between the bit outputs of the first (L L A variable division factor and another trigger input are entered, a coincidence element is introduced, and the key signal input is connected to the output of the first frequency divider with a fixed division factor. ate 00 oi

Description

The invention relates to radio engineering and can be used in communications equipment to generate a grid of frequencies.

A digital frequency synthesizer is known, which contains a looped controlled oscillator, a first frequency divider with a variable division factor, a first phase detector and a first low-pass filter, and a second frequency divider connected in series with a variable division factor, a second phase detector and a high-pass filter, the output of which is connected to the second input of the controlled reHispaTOpa, as well as the series-connected reference oscillator and the first frequency divider with a constant division factor and hence the connected second low-pass filter, the controlled crystal oscillator and the second frequency divider with a constant division factor G.

The lack of a digital frequency synthesizer is a high level of phase) due to the deterioration of the phase stability of the controlled quartz oscillator when it is rearranged.

The closest in technical essence to the proposed is. a digital frequency synthesizer containing a tunable tunable oscillator, the first frequency divider c. a fixed division factor, a first frequency divider with a variable division factor, a first pulse-phase detector and a first low-pass filter, as well as serially connected second frequency divider with a variable division factor, a second pulse-phase detector and a high-pass filter, the output of which is connected to another input of a tunable oscillator, as well as a series-connected reference oscillator and a second frequency divider with a fixed division factor, the output of which is connected to the second inputs of the first and second pulse-phase detectors RV. 2 .

A disadvantage of the known digital frequency synthesizer is the low phase stability in the frequency range of the synthesizer tuning.

The purpose of the invention is to increase the phase stability of output oscillations.

This goal is achieved by having a tunable oscillator, a first frequency divider with a fixed division factor, a first frequency divider with a variable division factor, a first pulse-phase detector and a first low-pass filter, as well as serially connected second frequency divider with a variable division factor, it

a pulse-phase detector and a high-pass filter, the output of which is connected to another input of a tunable generator, as well as a series-connected reference oscillator and a second frequency divider with a fixed division factor, the output of which is connected to the second inputs of the first and second pulse-phase detectors, between the output of a tunable the generator and the input of the second frequency divider with a variable coefficient are introduced in series connected amplitude detector, the second low-pass filter, the trigger and spanner, and between porazr dnymi outputs of the first frequency divider with a variable division factor, and the other input of the coincidence element trigger.a, wherein the key signal input coupled to the output of the first frequency divider with a fixed division factor.

The drawing shows a block diagram of a digital frequency synthesizer.

The synthesizer contains a reference oscillator 1, the first divider with a fixed division factor (DFCD) 2, a tunable oscillator 3, a BTopiSR frequency divider with a fixed division factor (DFCD) 4, the first frequency divider with a variable division factor (DDC) 5, the first pulse-phase detector {IFD) b, first low-pass filter (LPF) 7, key 8, second frequency divider with variable division factor (DPD) 9, second pulse-phase detector (IFD) 10, high pass filter (HPF) 11, trigger 12, joint element 13, amplitude detail Ktorov 14 and a second low-pass filter (LPF) 15.

The synthesizer works as follows.

The first DFCD 2, the first DPDD 5, the first IFD 6 and the first LPF 7 form a phase locked loop of the frequency of the perestawable generator 3. The key is 8, the second DPDD 9, the second IFD 10 and the HPF 11 form a ring of high-frequency correction. The signal from the first DP: CD 5 enters the input of the first IFD 6. At the same time, the parasitic phase modulation of the tunable generator 3 is discretized, so that if the frequency of the parasitic phase modulation is more than twice the sampling frequency, then information about it is lost. In this case, the step of tuning the frequency of the synthesizer corresponds to twice the sampling frequency, since both fronts of the output pulses of the first DPCD 5 carry information.

Thus, if a sequence of pulses from the output of the first DFCD 2 with a frequency I onjjj, is fed to the input of the first DPCD 5 with a division factor K, then information about parasitic phase modulation with a frequency

 Oikv J rubbed on. A delay is applied to restore it in the parallel phase correction channel. The signal from the tunable oscillator 3, after passing through the amplitude detector 14 and the second low-pass filter 15, sets trigger 12 to zero. Its signal locks the key 8. After a left and a pulse at the output of the element 13 coincident trigger 11 is set to one and unlocks the key 8 and the sequence of pulses goes to the second PDKD 9.

From the outputs of the first and second DPCD and 9 pulse sequences, from

Lying one from the other in duration, they go to the inputs of the first and second 6 and 10, the second inputs of which receive the reference signal from the second DFCD 4. The output signals of the IFH through the first low-pass filter 7 and the highpass filter 11 affect the tunable generator 3, whose inputs are acted upon pulses with

frequency, twice the frequency of the signal from the first DPCD 5 in the main channel of the phase-locked loop frequency. Consequently, the information about the parasitic phase modulation frequencies lost in the main channel is restored. This allows you to expand the bandwidth of the phase-locked loop of a tunable oscillator and get a high phase in the extended band. vuyu stability of output oscillations.

Claims (1)

A DIGITAL FREQUENCY SYNTHESIZER comprising a tunable oscillator connected in a ring, a first frequency divider with a fixed division ratio, a first frequency divider with a variable division coefficient, a first pulse-phase detector and a first low-pass filter, as well as a second frequency divider with a variable division ratio, connected in series , the second pulse-phase detector and a high-pass filter, the output of which is connected to another input of the tunable generator, and also connected in series a reference oscillator and a second frequency divider with a fixed division coefficient, the output of which is connected to the second inputs of the first and second pulse-phase detectors, characterized in that, in order to increase the phase stability of the output oscillations, between the output of the tunable generator and the input of the second frequency divider with neper variable the dividing coefficient introduced sequentially connected amplitude detector, a second low-pass filter, a trigger and a key, and between the <digit outputs of the first frequency divider with variable a coincidence element is introduced by the division coefficient and the other trigger input, the signal input of the key being connected to the output of the first frequency divider with a fixed division coefficient. ι 1058076 2