SU1117840A1 - Digital frequency synthesizer - Google Patents

Abstract

A DIGITAL FREQUENCY SYNTHESIZER containing ring-controlled oscillator, frequency divider with variable division factor, first pulse-phase detector and low-pass filter, serially connected reference oscillator and frequency divider with fixed division factor whose output is connected to another input of the first pulse- phase detector, as well as a second pulse-phase detector connected in series, and a high-pass filter, the output of which is connected to another input of a controlled nerator, distinguishing: and with - the fact that, in order to alter the phase stability of the output oscillations, a D-trigger is introduced, the clock input and the output of which are respectively connected to the output of the controlled oscillator and the first input of the second pulse-phase detector, the second input which, combined with the information input of the D-flip-flop and connected to the output of the reference generator.

Description

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ABOUT

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The invention relates to radio engineering and can be used, for example, in devices of the range of quartz-frequency frequency stabilization in communications equipment and measurement technology.

A digital frequency synthesizer is known that includes a looped controlled oscillator, a frequency divider with a fixed division factor, a first frequency divider with a variable division factor, a phase detector and a low-pass filter serially connected with a second frequency divider with a variable division factor, a frequency demodulator and a filter upper clock as well as series-connected reference oscillator and frequency divider with a constant division factor, the output of which is connected to another input phase detector Ci

The disadvantage of this digital frequency synthesizer is the lack of phase stability in the frequency range of the tuning due to the conflicting requirements of the frequency discriminator to expand its discriminatory characteristics while maintaining high sensitivity.

The closest in technical essence to the invention is a digital frequency synthesizer comprising a controlled ring oscillator, a variable division frequency divider, a first pulse-phase detector and a low-pass filter, a reference oscillator connected in series and a frequency division divider, the output of which is connected to another input of the first pulse-phase detector, as well as a second pulse-phase detector and an upper filter the output of which is connected to another input of the controllable oscillator

However, the well-known digital frequency synthesizer also has an insufficient phase stability of the output oscillations.

The purpose of the invention is to increase the phase stability of the output oscillations.

The goal is achieved by the fact that a digital frequency synthesizer containing ring-connected

178402

controlled oscillator, variable dividing frequency divider, first pulse-phase detector and low-pass filter, followed by a predominantly connected reference oscillator and fixed-division factor frequency divider whose output is connected to another input of the first pulse-phase detector, JQ and A second pulse-phase detector and a high-pass filter, the output of which is connected to another input of the controlled oscillator, are connected in series -. It is connected with the output of the controlled generator and the first input of the second pulse-phase detector, the second input of which is combined with the information input of the D-flip-flop and connected to the output of the reference generator.

The drawing shows a structural electrical circuit of a digital synthesizer, frequencies.

The digital frequency synthesizer contains a controlled oscillator 1, a split frequency divider 2 with variable division factor (DPD), a first pulse-phase detector (IFD) 3, low-pass filter 4 (LPF), a second IFD 5, high-pass filter 6 (HPF) , reference generator 7, frequency divider 8 with a fixed division factor (DFCD), D-flip-flop 9. 5 The digital frequency synthesizer works as follows.

The controlled oscillator 1, DPDD 2, the first IFD 3 and the low-pass filter 4 form the phase locked loop of the controlled oscillator 1, D-flip-flop 9, the second IFD 5, HPF 6 form the ring of high-frequency phase correction. The signal from DPDD 2 is input to the first IFD 3, and the parasitic hrsh phase modulus (PFM) of the generator under control 1 is sampled by the pulse fronts from the DPKD2 output, and if the PFM frequency is greater than twice the sampling rate, information about it is lost, and In the output spectrum of the digital frequency synthesizer, spurious components appear that are multiples of the tuning step. In this case, the tuning step corresponds to twice the sampling frequency, since both fronts of DCPD output pulses carry information. Thus, ter are information of PN with frequencies

/2.K,

PF / s

% pkd

where K is the division ratio of DCPD 2; jirtKA output frequency DPVD 2.

To restore information about 5 PFMs in the phase correction ring, the signal of the reference generator 7 with high phase stability is phase-modulated by the signal of the controlled oscillator 1 with a D-flip-flop 9. 10

Modulation is carried out as follows.

When changing information at information input D, Ostrig ger .9 is transferred to the next state by pulse 15 at clock input C. As a result, the fronts of pulses from the reference generator 7 change their position in accordance with the PPM. It is evident that in the process of phase modulation of the reference signal 20, the PFM signal is discretized; controlled oscillator 1 with the doubled frequency of the reference oscillator 7. The sampling frequency is selected on the basis of obtaining the desired 25 bandwidth of the phase locked loop and can be any one.

Thus, the PFM information of the controlled oscillator Zo 1 is restored in the phase-locked loop, and the level of phase yums at the output of the synthesizer (at the phase-locked loop) is determined only by the noise of the reference oscillator 7, which is highly stable.

. In the process of tuning into the frequency range, the high-frequency Koppeiftion ring does not affect the operation of the synthesizer, since the frequency of the pulses from the output of the p-flip-flop 9 always corresponds to the signal frequency of the reference generator 7 and does not form a beat at the output of the second IFD 5.

Thus, the proposed digital frequency synthesizer has a higher phase stability compared to the known one, since the phase signal of the reference oscillator 7 is modulated by the control of its ergo generator 1, which allows recovering the lost information about the PPM of the output signal in the phase locked loop and improve its filtering properties.

The idea of a digital frequency synthesizer in I, with deep feedback in the high-frequency phase correction circuit, allows to bring the level of noise and side components of the output signal to the noise level of high-quality quartz oscillators, i.e. about 140-150 dB. In this case, the high-frequency correction ring is extremely simple and does not affect the tuning rate from frequency to frequency.

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Claims (1)

i DIGITAL FREQUENCY SYNTHESIZER, comprising a controlled oscillator connected in a ring, a frequency divider with a variable division ratio, a first pulse-phase detector and a low-pass filter, a reference oscillator and a frequency divider with a fixed division ratio, the output of which is connected to another input of the first pulse phase detector, as well as series-connected second pulse-phase detector, th high-pass filter, the output of which is connected to another input of the controlled generator This is distinguished by the fact that, in order to increase the phase stability of the output oscillations, a D-trigger is introduced, the clock input and output of which are respectively connected to the output of the controlled oscillator and the first input of the second pulse-phase detector, the second input of which is combined with information on the input of the D-trigger and is connected to the output of the reference generator.