SU1019645A1 - Bipulse signal receiver - Google Patents

Description

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The invention relates to radio engineering and can be used in digital information transmission equipment.

A known biopulse signal receiver, a srpspraad counting trigger, and a series-connected ffS trigger and comparison unit G13 "

However, the known receiver does not detect S81shbki and distortion -in. by pulse CHrf | ane.

The purpose of the invention is the detection of overshoot and distortion in a bi-pulse signal.

The goal is achieved by the fact that the OR element, the OR OR HY element and the serially connected delay element and the AND element, whose output is connected to the first inputs of the RS trigger, are introduced into the bi-pulse signal receiver containing the numerical trigger and the R5 trigger in series and the comparison unit. and the OR element, the second input of which is connected to the second input of the Rs-flip-flop and the output of the OR-NOT element, the first

.which is connected to the input of the delay element and to the second input of the AND element, the first input of which is connected to the second input of the OR-NOT element, while the output of the OR element is connected to the input of the counting trigger, the output of which is connected to the second input of the C5 avn,

The (. I shows the structural electrical circuit of the proposed receiver; Fig. 2 shows voltage diagrams, and its operation is shown).

. Receiver of pulse pulse signal sieves iRS-trigger 1, counting trigger 2, comparison block 3, delay element 4, AND element 5, OR-N element, OR element 7.

The receiver works as follows.

The input bi-pulse signal (Fig. 2, c) is fed to the corresponding inputs of the element I 5 and the element ILN-NOT b and to the input of the delay element 4, which delays the input signal by the half-clock period (Fig. 25). At the output of element 5, a pulse is formed. FIG. 2c) if there is a pulse in the biopulse signal. Longer than half, for example, when the transmission of information passes from O to 1. At the output of the OR-NOT 6 element, an impulse appears (Fig. 2g) if there is a pause in the signal that is longer than half the cycle , for example, when transferring the transmitted information from 1 to O. These pulses come

, to the inputs of the PS flip-flop 1, from the output of which a signal of the transmitted information is generated in binary form (Fig. 2a), and to the input of the OR element 7, which combines these pulses (Fig. 2e). From the output of the element OR 7, the pulses are received from the input of the counting trigger 2, the signal at the output of which (Fig. 2) is compared with the signal (Fig. 2 a) at the gate (5-trigger 1).

If there are no signals in the input signal and no distortion, the impulses at the outputs of element 5 and element b1-1 are not

correspond only to changes in information and alternate. If there are distortions, they are caused by additional impulses that disrupt the alternation of impulses at their outputs. Counting trigger 2 responds to all pulses, and R5-trigger 1 does not respond to impulses going on. As a result, counting trigger 2 makes switching more than RS-trigger 1 to the number of additional pulses. At the same time, the number of edges (j in the signal (Fig. 2h), at the output of the comparison unit corresponds to the number of additional, i.e., distortion-induced, pulses (in Fig. 2, they are shaded),

Thus, the proposed receiver makes it possible to detect the error and distortion in a bi-pulse signal, which is necessary, for example, in remote control of regenerators, when the quality of the regeneration section is determined by the distortion value. The sensitivity of the receiver to distortions of short duration, in particular, is determined by the response speed of the triggers used (forward propagation). If necessary, the successor's sensitivity to distortion can be reduced for a given response speed of triggers, for example, the integration of signals at the trigger inputs.

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Claims (1)

(54) (57) A BIMPULSE SIGNAL RECEIVER containing a counting trigger and a RS-trigger and a block connected in series, comparisons that include the OR-NOT element and series-connected delay element and the element and whose output is connected to the first inputs of the RS-trigger and the OR element, the second input of which is connected to the second input of the RS-trigger and the output of the OR-NOT element, the first input of which is connected to the input of the element delays and with a second input ele cient And, the first input coupled to a second input of OR-Nyo, the output of OR element connected to the counting input of the flip-flop, whose output is connected to the second input of the comparator.