SG98690G - Circuit for decoding the vertical synchronisation pulse in a composite video signal - Google Patents

Circuit for decoding the vertical synchronisation pulse in a composite video signal

Info

Publication number
SG98690G
SG98690G SG986/90A SG98690A SG98690G SG 98690 G SG98690 G SG 98690G SG 986/90 A SG986/90 A SG 986/90A SG 98690 A SG98690 A SG 98690A SG 98690 G SG98690 G SG 98690G
Authority
SG
Singapore
Prior art keywords
pulses
vertical synchro
equalizing
signal
vertical
Prior art date
Application number
SG986/90A
Original Assignee
Thomson Grand Public
Thomson Brandt Gmbh
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Thomson Grand Public, Thomson Brandt Gmbh filed Critical Thomson Grand Public
Publication of SG98690G publication Critical patent/SG98690G/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
    • H04N5/00—Details of television systems
    • H04N5/04—Synchronising
    • H04N5/08—Separation of synchronising signals from picture signals
    • H04N5/10—Separation of line synchronising signal from frame synchronising signal or vice versa

Landscapes

  • Engineering & Computer Science (AREA)
  • Multimedia (AREA)
  • Signal Processing (AREA)
  • Synchronisation In Digital Transmission Systems (AREA)
  • Television Systems (AREA)
  • Compression Or Coding Systems Of Tv Signals (AREA)
  • Compression, Expansion, Code Conversion, And Decoders (AREA)
  • Synchronizing For Television (AREA)

Abstract

1. A circuit for decoding the vertical synchro pulses of a composite synchronization signal in an interlaced frame system, with the vertical synchro pulses comprising n positive pulses preceded by n negative front equalizing pulses and followed by n negative back equalizing pulses, these vertical synchro pulses and equalizing pulses having a frequency which is twice the line scanning frequency, characterized in that it comprises digital means for producing, on the basis of the composite synchronization signal, a rectangular signal (Q1 ) of half the line frequency, and a rectangular signal (Q3 ) of half the line frequency during the frame, except during the equalizing and the vertical synchro pulse periods, when the signal (Q3 ) has line frequency, the relative phase of the two rectangular signals depending upon the rank parity of the frame, and that it comprises a means (20, 22, 23, 24) for correlating these rectangular signals (Q1 , Q3 ) in order to generate decoded vertical synchro pulses, whose start coincides, substantially without delay, with the start of the vertical synchro pulses of the composite synchronization signal.
SG986/90A 1984-12-27 1990-12-10 Circuit for decoding the vertical synchronisation pulse in a composite video signal SG98690G (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR8419921A FR2575626B1 (en) 1984-12-27 1984-12-27 TOP FRAME DECODING CIRCUIT IN A VIDEOCOMPOSITE SIGNAL

Publications (1)

Publication Number Publication Date
SG98690G true SG98690G (en) 1991-02-14

Family

ID=9311031

Family Applications (1)

Application Number Title Priority Date Filing Date
SG986/90A SG98690G (en) 1984-12-27 1990-12-10 Circuit for decoding the vertical synchronisation pulse in a composite video signal

Country Status (5)

Country Link
EP (1) EP0188964B1 (en)
AT (1) ATE41579T1 (en)
DE (1) DE3568928D1 (en)
FR (1) FR2575626B1 (en)
SG (1) SG98690G (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
EP1176810A1 (en) * 2000-07-28 2002-01-30 THOMSON multimedia Display device, synchronisation circuit and process for generating a synchronisation signal in a display device

Family Cites Families (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5545151A (en) * 1978-09-27 1980-03-29 Hitachi Ltd Detection circuit for vertical synchronizing signal
NL7811812A (en) * 1978-12-04 1980-06-06 Philips Nv TV CIRCUIT FOR DERIVING A GRID SYNCHRONIZER SIGNAL FROM A COMPOSITE SYNCHRONIZER SIGNAL.

Also Published As

Publication number Publication date
EP0188964B1 (en) 1989-03-15
DE3568928D1 (en) 1989-04-20
FR2575626B1 (en) 1987-01-30
FR2575626A1 (en) 1986-07-04
ATE41579T1 (en) 1989-04-15
EP0188964A1 (en) 1986-07-30

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