JPS57162576A - Vertical synchronizing device - Google Patents
Vertical synchronizing deviceInfo
- Publication number
- JPS57162576A JPS57162576A JP4783581A JP4783581A JPS57162576A JP S57162576 A JPS57162576 A JP S57162576A JP 4783581 A JP4783581 A JP 4783581A JP 4783581 A JP4783581 A JP 4783581A JP S57162576 A JPS57162576 A JP S57162576A
- Authority
- JP
- Japan
- Prior art keywords
- vertical synchronizing
- signal
- counter
- broadcast standard
- diagram
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
Classifications
-
- H—ELECTRICITY
- H04—ELECTRIC COMMUNICATION TECHNIQUE
- H04N—PICTORIAL COMMUNICATION, e.g. TELEVISION
- H04N5/00—Details of television systems
- H04N5/04—Synchronising
- H04N5/12—Devices in which the synchronising signals are only operative if a phase difference occurs between synchronising and synchronised scanning devices, e.g. flywheel synchronising
Landscapes
- Engineering & Computer Science (AREA)
- Multimedia (AREA)
- Signal Processing (AREA)
- Synchronizing For Television (AREA)
Abstract
PURPOSE:To improve stability for the switching between an automatic synchronization and a direct synchronizaton with a vertical synchronizing circuit of a TV picture receiver, by deciding whether the received vertical synchronizing signal is in accordance with the broadcast standard by setting the detecting margine of a counter within a certain range. CONSTITUTION:In case the vertical synchronizing pulse Vsync (Hz) is identical with the signal Vsync =2fH/525 as defined by the broadcast standard, a counter shown in the diagram counts 2625 or 2626 according to the difference of phase. On the other hand, it is very hard to decide whether the vertical synchronizing signal is in accordance with the broadcast standard if the said signal receives the interference of a video wave detection signal. In this connection, a detection margin is secured for a vertical synchronizing pulse deciding circuit as shown in the diagram. In other words, the counter is connected to an NAND circuit N3N4 with each relation as shown in the diagram. As a result, the broadcast standard signal can be decided up to 2625+ or -3 for the detection of the counter. Thus the frequent switching is avoided between the automatic and direct synchronizations to secure the extremely high stability of switching.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4783581A JPS57162576A (en) | 1981-03-30 | 1981-03-30 | Vertical synchronizing device |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP4783581A JPS57162576A (en) | 1981-03-30 | 1981-03-30 | Vertical synchronizing device |
Publications (2)
Publication Number | Publication Date |
---|---|
JPS57162576A true JPS57162576A (en) | 1982-10-06 |
JPS6132870B2 JPS6132870B2 (en) | 1986-07-30 |
Family
ID=12786412
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP4783581A Granted JPS57162576A (en) | 1981-03-30 | 1981-03-30 | Vertical synchronizing device |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS57162576A (en) |
-
1981
- 1981-03-30 JP JP4783581A patent/JPS57162576A/en active Granted
Also Published As
Publication number | Publication date |
---|---|
JPS6132870B2 (en) | 1986-07-30 |
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