JPS6429175A - Synchronizing signal generation circuit in television receiver - Google Patents

Synchronizing signal generation circuit in television receiver

Info

Publication number
JPS6429175A
JPS6429175A JP18587387A JP18587387A JPS6429175A JP S6429175 A JPS6429175 A JP S6429175A JP 18587387 A JP18587387 A JP 18587387A JP 18587387 A JP18587387 A JP 18587387A JP S6429175 A JPS6429175 A JP S6429175A
Authority
JP
Japan
Prior art keywords
synchronizing signal
cycle
inputted
circuit
horizontal synchronizing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP18587387A
Other languages
Japanese (ja)
Inventor
Kohei Ueno
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP18587387A priority Critical patent/JPS6429175A/en
Publication of JPS6429175A publication Critical patent/JPS6429175A/en
Pending legal-status Critical Current

Links

Landscapes

  • Synchronizing For Television (AREA)

Abstract

PURPOSE:To enable a synchronizing signal with high stability to be generated by detecting the cycle of a separated synchronizing signal from it, smoothing the fluctuation part of the cycle, eliminating the fluctuation part when it is bigger than a threshold and generating the synchronizing signal based on the cycle of the smoothed synchronizing signal. CONSTITUTION:A compound video signal 1 is inputted to a horizontal synchronizing separator circuit 2 and the digital data of the cycle detected by a cycle detection circuit 5 is inputted to a smoothing circuit 6 and smoothed. The smoothed cycle data of the synchronizing signal is inputted to the elimination circuit 10 of the synchronizing signal cycle data of a discontinuous horizontal synchronizing signal at the time of switching a channel. On the other hand, the horizontal synchronizing signal separated by the horizontal synchronizing separator circuit 2 is inputted to a continuity detection circuit 3 and the continuity of the horizontal synchronizing signal is monitored. When the continuity is detected, a control signal 16 is inputted to the circuit 10 eliminating the discontinuous cycle data of the horizontal synchronizing signal and the cycle data at the time of detecting the continuity before that is outputted when the discontinuity is detected. Thus the synchronizing signal with high stability can be generated.
JP18587387A 1987-07-24 1987-07-24 Synchronizing signal generation circuit in television receiver Pending JPS6429175A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP18587387A JPS6429175A (en) 1987-07-24 1987-07-24 Synchronizing signal generation circuit in television receiver

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP18587387A JPS6429175A (en) 1987-07-24 1987-07-24 Synchronizing signal generation circuit in television receiver

Publications (1)

Publication Number Publication Date
JPS6429175A true JPS6429175A (en) 1989-01-31

Family

ID=16178372

Family Applications (1)

Application Number Title Priority Date Filing Date
JP18587387A Pending JPS6429175A (en) 1987-07-24 1987-07-24 Synchronizing signal generation circuit in television receiver

Country Status (1)

Country Link
JP (1) JPS6429175A (en)

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