SG54548A1 - Contact formation for a semiconductor device - Google Patents
Contact formation for a semiconductor deviceInfo
- Publication number
- SG54548A1 SG54548A1 SG1997003011A SG1997003011A SG54548A1 SG 54548 A1 SG54548 A1 SG 54548A1 SG 1997003011 A SG1997003011 A SG 1997003011A SG 1997003011 A SG1997003011 A SG 1997003011A SG 54548 A1 SG54548 A1 SG 54548A1
- Authority
- SG
- Singapore
- Prior art keywords
- semiconductor device
- contact formation
- formation
- contact
- semiconductor
- Prior art date
Links
- 230000015572 biosynthetic process Effects 0.000 title 1
- 239000004065 semiconductor Substances 0.000 title 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
- H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
- H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
- H01L21/28—Manufacture of electrodes on semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/268
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76829—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers
- H01L21/76831—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing characterised by the formation of thin functional dielectric layers, e.g. dielectric etch-stop, barrier, capping or liner layers in via holes or trenches, e.g. non-conductive sidewall liners
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
- H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
- H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
- H01L21/768—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics
- H01L21/76801—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing
- H01L21/76802—Applying interconnections to be used for carrying current between separate components within a device comprising conductors and dielectrics characterised by the formation and the after-treatment of the dielectrics, e.g. smoothing by forming openings in dielectrics
- H01L21/76816—Aspects relating to the layout of the pattern or to the size of vias or trenches
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L23/00—Details of semiconductor or other solid state devices
- H01L23/52—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames
- H01L23/522—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames including external interconnections consisting of a multilayer structure of conductive and insulating layers inseparably formed on the semiconductor body
- H01L23/5226—Via connections in a multilevel interconnection structure
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/0001—Technical content checked by a classifier
- H01L2924/0002—Not covered by any one of groups H01L24/00, H01L24/00 and H01L2224/00
Landscapes
- Engineering & Computer Science (AREA)
- Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- General Physics & Mathematics (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Manufacturing & Machinery (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Semiconductor Memories (AREA)
- Drying Of Semiconductors (AREA)
- Electrodes Of Semiconductors (AREA)
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
US2504196P | 1996-08-28 | 1996-08-28 |
Publications (1)
Publication Number | Publication Date |
---|---|
SG54548A1 true SG54548A1 (en) | 1998-11-16 |
Family
ID=21823728
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SG1997003011A SG54548A1 (en) | 1996-08-28 | 1997-08-21 | Contact formation for a semiconductor device |
Country Status (5)
Country | Link |
---|---|
EP (1) | EP0827195A1 (zh) |
JP (1) | JPH1092935A (zh) |
KR (1) | KR19980019002A (zh) |
SG (1) | SG54548A1 (zh) |
TW (1) | TW346668B (zh) |
Families Citing this family (11)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
TW460748B (en) * | 1998-05-26 | 2001-10-21 | Matsushita Electronics Corp | Capacitor and method for fabricating the same |
JP3214449B2 (ja) | 1998-06-12 | 2001-10-02 | 日本電気株式会社 | 半導体記憶装置の製造方法 |
JP2000031273A (ja) * | 1998-07-13 | 2000-01-28 | Nec Corp | 半導体装置およびその製造方法 |
US6358756B1 (en) * | 2001-02-07 | 2002-03-19 | Micron Technology, Inc. | Self-aligned, magnetoresistive random-access memory (MRAM) structure utilizing a spacer containment scheme |
KR100979229B1 (ko) * | 2003-04-23 | 2010-08-31 | 주식회사 하이닉스반도체 | 반도체소자의 캐패시터 형성방법 |
JP3976703B2 (ja) | 2003-04-30 | 2007-09-19 | エルピーダメモリ株式会社 | 半導体装置の製造方法 |
KR100980294B1 (ko) * | 2003-06-28 | 2010-09-06 | 주식회사 하이닉스반도체 | 반도체 소자의 커패시터 형성방법 |
JP2007180493A (ja) | 2005-11-30 | 2007-07-12 | Elpida Memory Inc | 半導体装置の製造方法 |
KR100859636B1 (ko) | 2007-09-14 | 2008-09-23 | 주식회사 동부하이텍 | 반도체 장치의 제조 방법 |
JP2020009840A (ja) * | 2018-07-04 | 2020-01-16 | 東京エレクトロン株式会社 | エッチング方法及び基板処理装置 |
US11600519B2 (en) * | 2019-09-16 | 2023-03-07 | International Business Machines Corporation | Skip-via proximity interconnect |
Family Cites Families (5)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
EP0302647A1 (en) * | 1987-08-03 | 1989-02-08 | AT&T Corp. | Aluminum plug using insulating sidewall space |
US5279990A (en) * | 1990-03-02 | 1994-01-18 | Motorola, Inc. | Method of making a small geometry contact using sidewall spacers |
KR950000658B1 (en) * | 1992-02-12 | 1995-01-27 | Hyundai Electronics Co Ltd | Forming method of contact hole in semiconductor devices |
US5262352A (en) * | 1992-08-31 | 1993-11-16 | Motorola, Inc. | Method for forming an interconnection structure for conductive layers |
KR0136569B1 (ko) * | 1992-10-24 | 1998-04-29 | 김주용 | 고집적 반도체 소자의 콘택홀 형성 방법 |
-
1997
- 1997-08-21 SG SG1997003011A patent/SG54548A1/en unknown
- 1997-08-26 KR KR1019970040871A patent/KR19980019002A/ko not_active Application Discontinuation
- 1997-08-27 EP EP97306564A patent/EP0827195A1/en not_active Withdrawn
- 1997-08-28 JP JP9232191A patent/JPH1092935A/ja active Pending
- 1997-10-01 TW TW086112484A patent/TW346668B/zh active
Also Published As
Publication number | Publication date |
---|---|
JPH1092935A (ja) | 1998-04-10 |
EP0827195A1 (en) | 1998-03-04 |
KR19980019002A (ko) | 1998-06-05 |
TW346668B (en) | 1998-12-01 |
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