SG129372A1 - All digital implementation of clock spectrum spreading (dither) for low power/die area - Google Patents

All digital implementation of clock spectrum spreading (dither) for low power/die area

Info

Publication number
SG129372A1
SG129372A1 SG200604607A SG200604607A SG129372A1 SG 129372 A1 SG129372 A1 SG 129372A1 SG 200604607 A SG200604607 A SG 200604607A SG 200604607 A SG200604607 A SG 200604607A SG 129372 A1 SG129372 A1 SG 129372A1
Authority
SG
Singapore
Prior art keywords
clock train
generate
clock
dither
train
Prior art date
Application number
SG200604607A
Other languages
English (en)
Inventor
Jody Greenberg
Original Assignee
Marvell World Trade Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Marvell World Trade Ltd filed Critical Marvell World Trade Ltd
Publication of SG129372A1 publication Critical patent/SG129372A1/en

Links

Classifications

    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B15/00—Suppression or limitation of noise or interference
    • H04B15/02—Reducing interference from electric apparatus by means located at or near the interfering apparatus
    • H04B15/04—Reducing interference from electric apparatus by means located at or near the interfering apparatus the interference being caused by substantially sinusoidal oscillations, e.g. in a receiver or in a tape-recorder
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K3/00—Circuits for generating electric pulses; Monostable, bistable or multistable circuits
    • H03K3/84—Generating pulses having a predetermined statistical distribution of a parameter, e.g. random pulse generators
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03K—PULSE TECHNIQUE
    • H03K7/00—Modulating pulses with a continuously-variable modulating signal
    • H03K7/06—Frequency or rate modulation, i.e. PFM or PRM
    • H—ELECTRICITY
    • H03—ELECTRONIC CIRCUITRY
    • H03L—AUTOMATIC CONTROL, STARTING, SYNCHRONISATION OR STABILISATION OF GENERATORS OF ELECTRONIC OSCILLATIONS OR PULSES
    • H03L7/00—Automatic control of frequency or phase; Synchronisation
    • H03L7/06—Automatic control of frequency or phase; Synchronisation using a reference signal applied to a frequency- or phase-locked loop
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B2215/00—Reducing interference at the transmission system level
    • H04B2215/064—Reduction of clock or synthesizer reference frequency harmonics
    • H—ELECTRICITY
    • H04—ELECTRIC COMMUNICATION TECHNIQUE
    • H04B—TRANSMISSION
    • H04B2215/00—Reducing interference at the transmission system level
    • H04B2215/064—Reduction of clock or synthesizer reference frequency harmonics
    • H04B2215/067—Reduction of clock or synthesizer reference frequency harmonics by modulation dispersion

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Networks & Wireless Communication (AREA)
  • Signal Processing (AREA)
  • Stabilization Of Oscillater, Synchronisation, Frequency Synthesizers (AREA)
  • Manipulation Of Pulses (AREA)
SG200604607A 2005-08-01 2006-07-12 All digital implementation of clock spectrum spreading (dither) for low power/die area SG129372A1 (en)

Applications Claiming Priority (3)

Application Number Priority Date Filing Date Title
US70451005P 2005-08-01 2005-08-01
US72273105P 2005-09-30 2005-09-30
US11/246,328 US7221704B2 (en) 2005-08-01 2005-10-06 All digital implementation of clock spectrum spreading (dither) for low power/die area

Publications (1)

Publication Number Publication Date
SG129372A1 true SG129372A1 (en) 2007-02-26

Family

ID=37459565

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200604607A SG129372A1 (en) 2005-08-01 2006-07-12 All digital implementation of clock spectrum spreading (dither) for low power/die area

Country Status (7)

Country Link
US (3) US7221704B2 (zh)
EP (1) EP1750381B1 (zh)
JP (1) JP4234157B2 (zh)
CN (1) CN1909374B (zh)
SG (1) SG129372A1 (zh)
TW (1) TWI318514B (zh)
WO (1) WO2007016607A2 (zh)

Families Citing this family (18)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US8174326B1 (en) 2005-06-30 2012-05-08 Cypress Semiconductor Corporation Phase lock loop control error selection system and method
US7912109B1 (en) * 2005-06-30 2011-03-22 Cypress Semiconductor Corporation Spread spectrum frequency synthesizer with first order accumulation for frequency profile generation
US7932787B1 (en) 2005-06-30 2011-04-26 Cypress Semiconductor Corporation Phase lock loop control system and method
US7961059B1 (en) 2005-06-30 2011-06-14 Cypress Semiconductor Corporation Phase lock loop control system and method with non-consecutive feedback divide values
US7813411B1 (en) * 2005-06-30 2010-10-12 Cypress Semiconductor Corporation Spread spectrum frequency synthesizer with high order accumulation for frequency profile generation
US7948327B1 (en) 2005-06-30 2011-05-24 Cypress Semiconductor Corporation Simplified phase lock loop control model system and method
US8072277B1 (en) 2005-06-30 2011-12-06 Cypress Semiconductor Corporation Spread spectrum frequency synthesizer
US7450680B2 (en) * 2006-10-19 2008-11-11 Agilent Technologies, Inc. Fractional-N divider configurable as a polynomial function for real-time PLL swept frequency applications
US8831064B1 (en) * 2007-06-13 2014-09-09 Xilinx, Inc. Method of and circuit for generating a spread spectrum clock signal
GB2451473A (en) * 2007-07-31 2009-02-04 Wolfson Microelectronics Plc Dithered clock signal generator with zero average dither
US8412105B2 (en) * 2007-11-26 2013-04-02 Apple Inc. Electronic devices with radio-frequency collision resolution capabilities
DE102011003738B4 (de) * 2011-02-08 2018-12-27 Robert Bosch Gmbh Verfahren und Vorrichtung zur Verringerung von Signalflankenjitter in einem Ausgangssignal eines numerisch kontrollierten Oszillators
US9236873B1 (en) * 2014-12-17 2016-01-12 Integrated Device Technology, Inc. Fractional divider based phase locked loops with digital noise cancellation
US9525457B1 (en) 2015-07-01 2016-12-20 Honeywell International Inc. Spread spectrum clock generation using a tapped delay line and entropy injection
US10659064B1 (en) 2017-02-24 2020-05-19 Marvell Asia Pte, Ltd. Phase lock loop circuits and methods including multiplexed selection of feedback loop outputs of multiple phase interpolators
WO2021014629A1 (ja) * 2019-07-25 2021-01-28 日本電信電話株式会社 同期検波装置、同期検波方法及びプログラム
US11016734B1 (en) 2020-01-30 2021-05-25 Northrop Grumman Systems Corporation Chip dithering using permuted randomized selection sets to enhance the LPI/LPD characteristics of a waveform
JP7193504B2 (ja) * 2020-07-20 2022-12-20 アンリツ株式会社 スペクトラム拡散クロック発生器及びスペクトラム拡散クロック発生方法、パルスパターン発生装置及びパルスパターン発生方法、並びに、誤り率測定装置及び誤り率測定方法

Family Cites Families (37)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2418584A1 (fr) * 1978-02-28 1979-09-21 Ibm France Procede et dispositif d'acquisition de la phase initiale de l'horloge dans un recepteur de donnees synchrone
US4253184A (en) * 1979-11-06 1981-02-24 Bell Telephone Laboratories, Incorporated Phase-jitter compensation using periodic harmonically related components
GB2074421B (en) * 1980-04-16 1983-12-07 Philips Electronic Associated Frequency modulator circuit arrangement
US4926447A (en) * 1988-11-18 1990-05-15 Hewlett-Packard Company Phase locked loop for clock extraction in gigabit rate data communication links
GB2248355B (en) * 1990-09-26 1994-07-13 British Aerospace Digital chirp generator
US5920555A (en) * 1994-07-28 1999-07-06 Roke Manor Research Limited Pilot assisted direct sequence spread spectrum synchronization apparatus
US5736893A (en) * 1996-01-29 1998-04-07 Hewlett-Packard Company Digital method and apparatus for reducing EMI emissions in digitally-clocked systems
US6044124A (en) * 1997-08-22 2000-03-28 Silicon Systems Design Ltd. Delta sigma PLL with low jitter
EA004457B1 (ru) * 1999-06-18 2004-04-29 Сосьете Эропеен Де Сателит С.А. Способ и устройство определения характеристик компонент канала связи
JP3613787B2 (ja) * 1999-10-18 2005-01-26 日本プレシジョン・サーキッツ株式会社 自己変調型クロック発生回路
US6160861A (en) * 1999-10-22 2000-12-12 Motorola, Inc. Method and apparatus for a frequency modulation phase locked loop
GB2357382B (en) * 1999-12-17 2004-03-31 Mitel Corp Clock recovery PLL
JP2001255958A (ja) * 2000-03-10 2001-09-21 Konica Corp クロック発生装置、基板および画像形成装置ならびにクロック発生方法
US6353649B1 (en) * 2000-06-02 2002-03-05 Motorola, Inc. Time interpolating direct digital synthesizer
US6650719B1 (en) * 2000-07-19 2003-11-18 Tektronix, Inc. MPEG PCR jitter, frequency offset and drift rate measurements
KR100694039B1 (ko) * 2000-07-20 2007-03-12 삼성전자주식회사 지터 검출 장치 및 그를 이용한 위상 동기 루프
JP2002208858A (ja) * 2001-01-10 2002-07-26 Matsushita Electric Ind Co Ltd 周波数シンセサイザと周波数生成方法
US6785345B2 (en) * 2001-01-18 2004-08-31 Tektronix, Inc. Frequency dithering for DDS spectral purity
US6510191B2 (en) * 2001-02-09 2003-01-21 Motorola, Inc. Direct digital synthesizer based on delay line with sorted taps
US7006589B2 (en) * 2001-04-25 2006-02-28 Texas Instruments Incorporated Frequency synthesizer with phase restart
US7587017B2 (en) * 2001-05-17 2009-09-08 Ut-Battelle, Llc Carrier phase synchronization system for improved amplitude modulation and television broadcast reception
US7042970B1 (en) * 2001-06-15 2006-05-09 Analog Devices, Inc. Phase frequency detector with adjustable offset
GB0121713D0 (en) * 2001-09-07 2001-10-31 Nokia Corp Accumulator based phase locked loop
US7346313B2 (en) * 2002-03-04 2008-03-18 Cafarella John H Calibration of I-Q balance in transceivers
US6823033B2 (en) * 2002-03-12 2004-11-23 Qualcomm Inc. ΣΔdelta modulator controlled phase locked loop with a noise shaped dither
US7684501B2 (en) * 2003-02-19 2010-03-23 Realtek Semiconductor Corp. Apparatus and method for carrier frequency offset and phase compensation in communication system
US7397848B2 (en) * 2003-04-09 2008-07-08 Rambus Inc. Partial response receiver
US7181180B1 (en) * 2003-05-15 2007-02-20 Marvell International Ltd. Sigma delta modulated phase lock loop with phase interpolation
US7460622B2 (en) * 2003-07-18 2008-12-02 Artimi Ltd Communications systems and methods
US7015733B2 (en) * 2003-10-10 2006-03-21 Oki Electric Industry Co., Ltd. Spread-spectrum clock generator using processing in the bitstream domain
US7545858B2 (en) * 2004-06-29 2009-06-09 Agilent Technologies, Inc. Method of measuring jitter frequency response
US7161970B2 (en) * 2004-09-10 2007-01-09 Ftd Solutions Pte, Ltd. Spread spectrum clock generator
US7321634B2 (en) * 2004-12-17 2008-01-22 Verigy (Singapore) Pte. Ltd. Method and apparatus for variable sigma-delta modulation
US7574185B2 (en) * 2004-12-17 2009-08-11 Verigy (Singapore) Pte. Ltd. Method and apparatus for generating a phase-locked output signal
US7680173B2 (en) * 2005-07-06 2010-03-16 Ess Technology, Inc. Spread spectrum clock generator having an adjustable delay line
US20070189431A1 (en) * 2006-02-15 2007-08-16 Texas Instruments Incorporated Delay alignment in a closed loop two-point modulation all digital phase locked loop
US7817747B2 (en) * 2006-02-15 2010-10-19 Texas Instruments Incorporated Precise delay alignment between amplitude and phase/frequency modulation paths in a digital polar transmitter

Also Published As

Publication number Publication date
US20070211819A1 (en) 2007-09-13
US8090010B2 (en) 2012-01-03
WO2007016607A2 (en) 2007-02-08
EP1750381A2 (en) 2007-02-07
JP4234157B2 (ja) 2009-03-04
JP2007043704A (ja) 2007-02-15
US7221704B2 (en) 2007-05-22
US8731021B2 (en) 2014-05-20
US20070025419A1 (en) 2007-02-01
CN1909374B (zh) 2010-09-15
US20120093196A1 (en) 2012-04-19
WO2007016607A3 (en) 2007-04-05
CN1909374A (zh) 2007-02-07
EP1750381B1 (en) 2017-03-08
TWI318514B (en) 2009-12-11
EP1750381A3 (en) 2011-11-30
TW200707931A (en) 2007-02-16

Similar Documents

Publication Publication Date Title
SG129372A1 (en) All digital implementation of clock spectrum spreading (dither) for low power/die area
TW200711316A (en) Clock generation circuit and clock generation method
US20070014382A1 (en) Reconfigurable transmitter
US8155164B2 (en) Spread frequency spectrum waveform generating circuit
TW200625822A (en) Spread spectrum clock generator and method for generating a spread spectrum clock signal
EP3016340A1 (en) Circuit, communication unit and method for vco frequency adjustment
TW200518535A (en) High performance modulator architecture for the outphasing rf amplifier
WO2008144579A3 (en) Fractional-n synthesized chirp generator
EP1345375A3 (en) Method and apparatus for frequency modulation
TWI263874B (en) A voltage modulator of a low gain current model and the control method thereof
TWI264186B (en) Spread spectrum clock generator and method of generating spread spectrum clock
BRPI0710967A2 (pt) transmissor ask/00k de espalhamento espectral
KR101954659B1 (ko) 가우시안 펄스 생성 장치 및 방법 그리고 가우시안 펄스를 생성하는 초광대역 통신 장치
ES2152907B1 (es) Aparato de radiotelefono de modo doble para modulacion digital o analogica.
WO2007038887A3 (en) Systems of parallel operating power electronic converters
TW200605512A (en) Circuit for applying jitter and test
EP1845624A4 (en) TRANSMITTER AND RADIO TRANSMISSION DEVICE
EP1737124A3 (en) Modulator and method for producing a modulated signal
WO2008032264A3 (en) Amplifier architecture for polar modulation
TW200633392A (en) Sigma-delta based phase lock loop
ATE494676T1 (de) Elektrisch gesteuerter optischer oszillator für einen optischen einseitenhilfsträger- phasenregelkreis
WO2003105430A3 (en) MODULATION SYSTEM FOR MODULATING DATA ON A CARRIER SIGNAL WITH OFFSETS TO COMPENSATE FOR A DOPPLER EFFECT AND FOR ALLOWING A FREQUENCY SYNTHESIS SYSTEM FOR ACHIEVING RANGES EQUAL TO CHANNEL BANDWIDTH
WO2008099724A1 (en) Linc transmission circuit and communication device using the same
RU2013106282A (ru) Схема тактирования для устройства беспроводной связи
TW200608684A (en) Switching control circuit with variable switching frequency for primary-side-controlled power converters