SG123492G - Method for fabricating a field-effect transistor with a self-aligned gate - Google Patents

Method for fabricating a field-effect transistor with a self-aligned gate

Info

Publication number
SG123492G
SG123492G SG1234/92A SG123492A SG123492G SG 123492 G SG123492 G SG 123492G SG 1234/92 A SG1234/92 A SG 1234/92A SG 123492 A SG123492 A SG 123492A SG 123492 G SG123492 G SG 123492G
Authority
SG
Singapore
Prior art keywords
fabricating
self
field
effect transistor
aligned gate
Prior art date
Application number
SG1234/92A
Other languages
English (en)
Original Assignee
American Telephone & Telegraph
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by American Telephone & Telegraph filed Critical American Telephone & Telegraph
Publication of SG123492G publication Critical patent/SG123492G/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00—Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66—Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007—Multistep manufacturing processes
    • H01L29/66075—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227—Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66409—Unipolar field-effect transistors
    • H01L29/66848—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET
    • H01L29/66856—Unipolar field-effect transistors with a Schottky gate, i.e. MESFET with an active layer made of a group 13/15 material
    • H01L29/66863—Lateral single gate transistors
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/308—Chemical or electrical treatment, e.g. electrolytic etching using masks
    • H01L21/3081—Chemical or electrical treatment, e.g. electrolytic etching using masks characterised by their composition, e.g. multilayer masks, materials
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/142—Semiconductor-metal-semiconductor
    • Y—GENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10—TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10S—TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S148/00—Metal treatment
    • Y10S148/145—Shaped junctions

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Manufacturing & Machinery (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Ceramic Engineering (AREA)
  • Junction Field-Effect Transistors (AREA)
  • Electrodes Of Semiconductors (AREA)
SG1234/92A 1986-12-19 1992-12-09 Method for fabricating a field-effect transistor with a self-aligned gate SG123492G (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US06/944,457 US4784967A (en) 1986-12-19 1986-12-19 Method for fabricating a field-effect transistor with a self-aligned gate

Publications (1)

Publication Number Publication Date
SG123492G true SG123492G (en) 1993-02-19

Family

ID=25481431

Family Applications (1)

Application Number Title Priority Date Filing Date
SG1234/92A SG123492G (en) 1986-12-19 1992-12-09 Method for fabricating a field-effect transistor with a self-aligned gate

Country Status (8)

Country Link
US (1) US4784967A (ja)
EP (1) EP0274866B1 (ja)
JP (1) JPS63164477A (ja)
CA (1) CA1271850A (ja)
DE (1) DE3778861D1 (ja)
ES (1) ES2030742T3 (ja)
HK (1) HK108693A (ja)
SG (1) SG123492G (ja)

Families Citing this family (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
KR920009718B1 (ko) * 1987-08-10 1992-10-22 스미도모덴기고오교오 가부시기가이샤 화합물반도체장치 및 그 제조방법
US5013685A (en) * 1989-11-02 1991-05-07 At&T Bell Laboratories Method of making a non-alloyed ohmic contact to III-V semiconductors-on-silicon
US6043143A (en) * 1998-05-04 2000-03-28 Motorola, Inc. Ohmic contact and method of manufacture
US6258616B1 (en) * 1998-05-22 2001-07-10 Lucent Technologies Inc. Method of making a semiconductor device having a non-alloyed ohmic contact to a buried doped layer
TW407309B (en) * 1999-01-29 2000-10-01 Nat Science Council MOSFET manufacturing process
US7483212B2 (en) * 2006-10-11 2009-01-27 Rensselaer Polytechnic Institute Optical thin film, semiconductor light emitting device having the same and methods of fabricating the same

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
NL167277C (nl) * 1970-08-29 1981-11-16 Philips Nv Halfgeleiderinrichting met een plaatvorming half- geleiderlichaam met over althans een deel van de dikte van het halfgeleiderlichaam afgeschuinde randen, dat is voorzien van een metalen elektrode die een gelijkrichtende overgang vormt met het halfgeleider- lichaam en werkwijze ter vervaardiging van de halfgeleiderinrichting.
US3993515A (en) * 1975-03-31 1976-11-23 Rca Corporation Method of forming raised electrical contacts on a semiconductor device
JPS5850428B2 (ja) * 1975-04-16 1983-11-10 株式会社東芝 メサ型半導体装置
US4029542A (en) * 1975-09-19 1977-06-14 Rca Corporation Method for sloping the sidewalls of multilayer P+ PN+ junction mesa structures
JPS52128078A (en) * 1976-04-21 1977-10-27 Mitsubishi Electric Corp Manufacture of field effect transistor
US4029562A (en) * 1976-04-29 1977-06-14 Ibm Corporation Forming feedthrough connections for multi-level interconnections metallurgy systems
JPS5412573A (en) * 1977-06-29 1979-01-30 Matsushita Electric Ind Co Ltd Junction type field effect transistor and production of the same
US4197551A (en) * 1977-09-14 1980-04-08 Raytheon Company Semiconductor device having improved Schottky-barrier junction
GB1602498A (en) * 1978-05-31 1981-11-11 Secr Defence Fet devices and their fabrication
GB1601059A (en) * 1978-05-31 1981-10-21 Secr Defence Fet devices and their fabrication
US4325181A (en) * 1980-12-17 1982-04-20 The United States Of America As Represented By The Secretary Of The Navy Simplified fabrication method for high-performance FET
FR2496982A1 (fr) * 1980-12-24 1982-06-25 Labo Electronique Physique Procede de fabrication de transistors a effet de champ, a grille auto-alignee, et transistors ainsi obtenus
JPS6089979A (ja) * 1983-10-24 1985-05-20 Fujitsu Ltd 半導体装置
FR2558647B1 (fr) * 1984-01-23 1986-05-09 Labo Electronique Physique Transistor a effet de champ de type schottky pour applications hyperfrequences et procede de realisation permettant d'obtenir un tel transistor
GB8413170D0 (en) * 1984-05-23 1984-06-27 British Telecomm Production of semiconductor devices
US4780748A (en) * 1986-06-06 1988-10-25 American Telephone & Telegraph Company, At&T Bell Laboratories Field-effect transistor having a delta-doped ohmic contact

Also Published As

Publication number Publication date
CA1271850A (en) 1990-07-17
JPS63164477A (ja) 1988-07-07
DE3778861D1 (de) 1992-06-11
EP0274866A1 (en) 1988-07-20
US4784967A (en) 1988-11-15
HK108693A (en) 1993-10-22
EP0274866B1 (en) 1992-05-06
ES2030742T3 (es) 1992-11-16

Similar Documents

Publication Publication Date Title
EP0303061A3 (en) Process for forming a planarized, metal-strapped polysilicon gate fet
IL83327A (en) Process for making a t-gate transistor
DE3569634D1 (en) Method of fabricating an insulated gate type field-effect transistor
HK1002037A1 (en) Self-aligned split gate eprom
EP0173953A3 (en) Method for manufacturing a semiconductor device having a gate electrode
DE3175448D1 (en) Method for making a self-aligned field effect transistor integrated circuit structure
GB2185350B (en) A method for mos transistor manufacture
EP0304839A3 (en) Method for fabricating insulated gate semiconductor device
EP0268298A3 (en) Method of producing the gate electrode of a filed effect transistor
EP0244366A3 (en) Self-aligned process for fabricating small size dmos cells and mos devices obtained by means of said process
EP0181091A3 (en) Schottky gate field effect transistor and manufacturing method thereof
DE3378806D1 (en) Method of fabricating a schottky gate field effect transistor
IL94199A0 (en) Self-aligned gate process for fabricating field emitter arrays
EP0495650A3 (en) Method of fabricating field-effect transistor
EP0239019A3 (en) Field-effect transistor devices
DE3464442D1 (en) Process for producing of a thin film transistor with self-aligned gate
DE3378239D1 (en) Method of manufacturing a semiconductor device having a self-aligned gate electrode
EP0184047A3 (en) Field-effect transistor with self-aligned gate and method for its manufacture
DE3568669D1 (en) Method of producing at least one thin-film field-effect transistor , and transistor obtained
EP0199497A3 (en) Process for fabricating a self-aligned bipolar transistor
EP0255970A3 (en) A method of manufacturing an insulated gate field effect transistor
DE3378601D1 (en) Process for manufacturing a buried gate field effect transistor
EP0304096A3 (en) A method of manufacturing lateral insulated-gate field-effect transistors
EP0668610A3 (en) Method for producing a field effect transistor with a Schottky gate.
FR2622355B1 (fr) Procede de fabrication d'un transistor a effet de champ a porte schottky