SG112989A1 - Across-thread out of order instruction dispatch in a multithreaded microprocessor - Google Patents

Across-thread out of order instruction dispatch in a multithreaded microprocessor

Info

Publication number
SG112989A1
SG112989A1 SG200407503A SG200407503A SG112989A1 SG 112989 A1 SG112989 A1 SG 112989A1 SG 200407503 A SG200407503 A SG 200407503A SG 200407503 A SG200407503 A SG 200407503A SG 112989 A1 SG112989 A1 SG 112989A1
Authority
SG
Singapore
Prior art keywords
order instruction
instruction dispatch
thread out
multithreaded microprocessor
multithreaded
Prior art date
Application number
SG200407503A
Other languages
English (en)
Inventor
S Moy Simon
Erik Lindholm John
Original Assignee
Nvidia Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Nvidia Corp filed Critical Nvidia Corp
Publication of SG112989A1 publication Critical patent/SG112989A1/en

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3836—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution
    • G06F9/3851—Instruction issuing, e.g. dynamic instruction scheduling or out of order instruction execution from multiple instruction streams, e.g. multistreaming
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3888—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple threads [SIMT] in parallel

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Multimedia (AREA)
  • Advance Control (AREA)
  • Executing Machine-Instructions (AREA)
SG200407503A 2003-12-18 2004-12-17 Across-thread out of order instruction dispatch in a multithreaded microprocessor SG112989A1 (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
US10/742,514 US7310722B2 (en) 2003-12-18 2003-12-18 Across-thread out of order instruction dispatch in a multithreaded graphics processor

Publications (1)

Publication Number Publication Date
SG112989A1 true SG112989A1 (en) 2005-07-28

Family

ID=34620632

Family Applications (1)

Application Number Title Priority Date Filing Date
SG200407503A SG112989A1 (en) 2003-12-18 2004-12-17 Across-thread out of order instruction dispatch in a multithreaded microprocessor

Country Status (6)

Country Link
US (3) US7310722B2 (zh)
EP (1) EP1555610B1 (zh)
JP (1) JP2005182825A (zh)
DE (1) DE602004026819D1 (zh)
SG (1) SG112989A1 (zh)
TW (1) TWI425418B (zh)

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