SG11202005329XA - Method for transferring a layer by using a detachable structure - Google Patents

Method for transferring a layer by using a detachable structure

Info

Publication number
SG11202005329XA
SG11202005329XA SG11202005329XA SG11202005329XA SG11202005329XA SG 11202005329X A SG11202005329X A SG 11202005329XA SG 11202005329X A SG11202005329X A SG 11202005329XA SG 11202005329X A SG11202005329X A SG 11202005329XA SG 11202005329X A SG11202005329X A SG 11202005329XA
Authority
SG
Singapore
Prior art keywords
transferring
layer
detachable structure
detachable
Prior art date
Application number
SG11202005329XA
Other languages
English (en)
Inventor
Michel Bruel
Original Assignee
Soitec Silicon On Insulator
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec Silicon On Insulator filed Critical Soitec Silicon On Insulator
Publication of SG11202005329XA publication Critical patent/SG11202005329XA/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate
    • H01L21/7813—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate leaving a reusable substrate, e.g. epitaxial lift off
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/185—Joining of semiconductor bodies for junction formation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/7806—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices involving the separation of the active layers from a substrate

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Container, Conveyance, Adherence, Positioning, Of Wafer (AREA)
  • Micromachines (AREA)
  • Thin Film Transistor (AREA)
  • Decoration By Transfer Pictures (AREA)
SG11202005329XA 2017-12-07 2018-11-21 Method for transferring a layer by using a detachable structure SG11202005329XA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
FR1761759A FR3074960B1 (fr) 2017-12-07 2017-12-07 Procede de transfert d'une couche utilisant une structure demontable
PCT/FR2018/052939 WO2019110886A1 (fr) 2017-12-07 2018-11-21 Procédé de transfert d'une couche utilisant une structure démontable

Publications (1)

Publication Number Publication Date
SG11202005329XA true SG11202005329XA (en) 2020-07-29

Family

ID=61802076

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11202005329XA SG11202005329XA (en) 2017-12-07 2018-11-21 Method for transferring a layer by using a detachable structure

Country Status (7)

Country Link
US (1) US11222824B2 (zh)
EP (1) EP3721470A1 (zh)
CN (1) CN111527590B (zh)
FR (1) FR3074960B1 (zh)
SG (1) SG11202005329XA (zh)
TW (1) TWI766128B (zh)
WO (1) WO2019110886A1 (zh)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR3108439B1 (fr) 2020-03-23 2022-02-11 Soitec Silicon On Insulator Procede de fabrication d’une structure empilee

Family Cites Families (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2748851B1 (fr) 1996-05-15 1998-08-07 Commissariat Energie Atomique Procede de realisation d'une couche mince de materiau semiconducteur
FR2823596B1 (fr) 2001-04-13 2004-08-20 Commissariat Energie Atomique Substrat ou structure demontable et procede de realisation
FR2823599B1 (fr) 2001-04-13 2004-12-17 Commissariat Energie Atomique Substrat demomtable a tenue mecanique controlee et procede de realisation
FR2830983B1 (fr) * 2001-10-11 2004-05-14 Commissariat Energie Atomique Procede de fabrication de couches minces contenant des microcomposants
DE602004010117D1 (de) * 2004-09-16 2007-12-27 St Microelectronics Srl Verfahren zur Hestellung von zusammengestzten Halbleiterplättchen mittels Schichtübertragung
KR101116993B1 (ko) * 2006-03-14 2012-03-15 인스티투트 퓌어 미크로엘렉트로닉 슈투트가르트 집적 회로의 제조 방법
KR101563138B1 (ko) * 2008-04-25 2015-10-26 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치 및 반도체 장치 제조 방법
DE102008056175A1 (de) * 2008-11-06 2010-05-12 Osram Opto Semiconductors Gmbh Verfahren zur Herstellung eines Strahlung emittierenden Dünnschichtbauelements und Strahlung emittierendes Dünnschichtbauelement
SG171762A1 (en) * 2008-11-19 2011-07-28 Agency Science Tech & Res Method of at least partially releasing an epitaxial layer
TWI415222B (zh) * 2009-04-06 2013-11-11 Canon Kk 半導體裝置及其製造方法
WO2011131847A1 (fr) * 2010-04-21 2011-10-27 Commissariat A L'energie Atomique Et Aux Energies Alternatives Procédé de transfert d'au moins une couche micro-technologique
US20110131847A1 (en) * 2009-12-08 2011-06-09 Brian Acworth Art display system and method
KR20150010776A (ko) * 2010-02-05 2015-01-28 가부시키가이샤 한도오따이 에네루기 켄큐쇼 반도체 장치, 및 반도체 장치의 제조 방법
CN104221170B (zh) * 2012-03-19 2017-02-22 首尔伟傲世有限公司 用于分离外延层与生长基板的方法及使用其的半导体器件
US9406551B2 (en) * 2012-09-27 2016-08-02 Infineon Technologies Austria Ag Method for manufacturing a semiconductor substrate, and method for manufacturing semiconductor devices integrated in a semiconductor substrate
FR2999801B1 (fr) * 2012-12-14 2014-12-26 Soitec Silicon On Insulator Procede de fabrication d'une structure
WO2015087192A1 (en) * 2013-12-12 2015-06-18 Semiconductor Energy Laboratory Co., Ltd. Peeling method and peeling apparatus
DE102014116276A1 (de) * 2014-11-07 2016-05-12 Osram Opto Semiconductors Gmbh Epitaxie-Wafer, Bauelement und Verfahren zur Herstellung eines Epitaxie-Wafers und eines Bauelements
US10050172B2 (en) * 2015-07-01 2018-08-14 Sensor Electronic Technology, Inc. Substrate structure removal

Also Published As

Publication number Publication date
CN111527590B (zh) 2023-09-29
WO2019110886A1 (fr) 2019-06-13
FR3074960B1 (fr) 2019-12-06
US20200388539A1 (en) 2020-12-10
TWI766128B (zh) 2022-06-01
CN111527590A (zh) 2020-08-11
EP3721470A1 (fr) 2020-10-14
US11222824B2 (en) 2022-01-11
FR3074960A1 (fr) 2019-06-14
TW201926515A (zh) 2019-07-01

Similar Documents

Publication Publication Date Title
EP3135631C0 (en) GRAPHENE TRANSFER PROCESS
HUE047807T2 (hu) Rendszer konvolúciós hálózat alkalmazására térbeli adatokon
SG11201704099SA (en) Method for preparing a magnetic chain structure
SG10201503005RA (en) Method For Transferring A Useful Layer
PL3333941T3 (pl) Sposób wytwarzania elektrody z użyciem walca
HK1263321A1 (zh) 生產鋰膜的方法
HK1244039A1 (zh) 打樁方法
HK1257132A1 (zh) 選擇性裝飾鐘錶組件的方法
HK1225699B (zh) 套筒印刷版的製造方法
GB2541062B (en) Method for preparing a sorbent
GB2541767B (en) Method for preparing a sorbent
HUE053142T2 (hu) Eljárás nyomósablon elõállítására mûszaki nyomtatáshoz
SG11202009447XA (en) Process for transferring a layer
GB201604818D0 (en) Method for forming structures upon a substrate
SG10201604535PA (en) Method of Mechanical Separation For A Double Layer Transfer
SG10201912610SA (en) A method for transferring a useful layer
PL3108026T3 (pl) Sposób przygotowania powierzchni przed powlekaniem przez natryskiwanie cieplne
SG11202005329XA (en) Method for transferring a layer by using a detachable structure
PT3539792T (pt) Método para o fabrico de estruturas num substrato
GB2541061B (en) Method for preparing a sorbent
PL3017944T3 (pl) Sposób wytwarzania prekursora litograficznej płyty drukowej
PT3019699T (pt) Resumo
SG10201913219RA (en) Method for manufacturing a substrate
GB2548080B (en) A method for image transformation
PL3160882T3 (pl) Sposób aktywacji warstwy na szklanym podłożu