SG11201908892TA - Memory refresh technology and computer system - Google Patents

Memory refresh technology and computer system

Info

Publication number
SG11201908892TA
SG11201908892TA SG11201908892TA SG11201908892TA SG 11201908892T A SG11201908892T A SG 11201908892TA SG 11201908892T A SG11201908892T A SG 11201908892TA SG 11201908892T A SG11201908892T A SG 11201908892TA
Authority
SG
Singapore
Prior art keywords
memory
computer system
refresh
rank
memory refresh
Prior art date
Application number
Other languages
English (en)
Inventor
Xing Hu
Chuanzeng Liang
Shihai Xiao
Kanwen Wang
Original Assignee
Huawei Tech Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Huawei Tech Co Ltd filed Critical Huawei Tech Co Ltd
Publication of SG11201908892TA publication Critical patent/SG11201908892TA/en

Links

Classifications

    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F13/00Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
    • G06F13/14Handling requests for interconnection or transfer
    • G06F13/16Handling requests for interconnection or transfer for access to memory bus
    • G06F13/1605Handling requests for interconnection or transfer for access to memory bus based on arbitration
    • G06F13/161Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement
    • G06F13/1636Handling requests for interconnection or transfer for access to memory bus based on arbitration with latency improvement using refresh
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40611External triggering or timing of internal or partially internal refresh operations, e.g. auto-refresh or CAS-before-RAS triggered refresh
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles
    • G11C11/40618Refresh operations over multiple banks or interleaving
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0602Interfaces specially adapted for storage systems specifically adapted to achieve a particular effect
    • G06F3/061Improving I/O performance
    • GPHYSICS
    • G06COMPUTING; CALCULATING OR COUNTING
    • G06FELECTRIC DIGITAL DATA PROCESSING
    • G06F3/00Input arrangements for transferring data to be processed into a form capable of being handled by the computer; Output arrangements for transferring data from processing unit to output unit, e.g. interface arrangements
    • G06F3/06Digital input from, or digital output to, record carriers, e.g. RAID, emulated record carriers or networked record carriers
    • G06F3/0601Interfaces specially adapted for storage systems
    • G06F3/0628Interfaces specially adapted for storage systems making use of a particular technique
    • G06F3/0655Vertical data movement, i.e. input-output transfer; data movement between one or more hosts and one or more storage devices
    • G06F3/0659Command handling arrangements, e.g. command buffers, queues, command scheduling
    • GPHYSICS
    • G11INFORMATION STORAGE
    • G11CSTATIC STORES
    • G11C11/00Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor
    • G11C11/21Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements
    • G11C11/34Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices
    • G11C11/40Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors
    • G11C11/401Digital stores characterised by the use of particular electric or magnetic storage elements; Storage elements therefor using electric elements using semiconductor devices using transistors forming cells needing refreshing or charge regeneration, i.e. dynamic cells
    • G11C11/406Management or control of the refreshing or charge-regeneration cycles

Landscapes

  • Engineering & Computer Science (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Computer Hardware Design (AREA)
  • Human Computer Interaction (AREA)
  • Dram (AREA)
  • Techniques For Improving Reliability Of Storages (AREA)
  • Memory System (AREA)
SG11201908892T 2017-04-14 2017-04-14 Memory refresh technology and computer system SG11201908892TA (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
PCT/CN2017/080640 WO2018188085A1 (zh) 2017-04-14 2017-04-14 内存刷新技术及计算机系统

Publications (1)

Publication Number Publication Date
SG11201908892TA true SG11201908892TA (en) 2019-11-28

Family

ID=63792104

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201908892T SG11201908892TA (en) 2017-04-14 2017-04-14 Memory refresh technology and computer system

Country Status (10)

Country Link
US (1) US20200066330A1 (ko)
EP (1) EP3605542B1 (ko)
JP (1) JP7043515B2 (ko)
KR (1) KR102258360B1 (ko)
CN (1) CN110546707B (ko)
AU (1) AU2017409368B2 (ko)
BR (1) BR112019021554B1 (ko)
CA (1) CA3058778C (ko)
SG (1) SG11201908892TA (ko)
WO (1) WO2018188085A1 (ko)

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US11244717B2 (en) * 2019-12-02 2022-02-08 Micron Technology, Inc. Write operation techniques for memory systems
KR20220031793A (ko) 2020-09-03 2022-03-14 삼성전자주식회사 메모리 장치, 그것을 포함하는 메모리 시스템, 그것을 제어하는 제어기 및 그것의 동작 방법
US11798604B2 (en) * 2021-09-01 2023-10-24 Dell Products L.P. Memory architecture having ranks with variable data widths
CN113741820B (zh) * 2021-09-18 2023-10-03 青岛海信传媒网络技术有限公司 一种数据从内存刷新到eMMC存储器的方法及显示设备
US20230236653A1 (en) * 2022-01-26 2023-07-27 Samsung Electronics Co.,Ltd. Power reduction for systems having multiple ranks of memory
US20230359373A1 (en) * 2022-05-03 2023-11-09 Qualcomm Incorporated Selective refresh for memory devices
CN115148248B (zh) * 2022-09-06 2022-11-08 北京奎芯集成电路设计有限公司 基于深度学习的dram刷新方法和装置

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JPH0349094A (ja) * 1989-07-18 1991-03-01 Toshiba Corp メモリ制御装置
JPH10149311A (ja) * 1996-11-20 1998-06-02 Ricoh Co Ltd メモリ制御装置
JP4154010B2 (ja) * 1997-07-17 2008-09-24 キヤノン株式会社 メモリ制御装置およびメモリ制御方法
CN101000798B (zh) * 2007-01-12 2010-05-19 威盛电子股份有限公司 存储器刷新方法及存储器刷新系统
JPWO2009139109A1 (ja) 2008-05-13 2011-09-15 パナソニック株式会社 メモリ制御装置、およびこれを備えた情報処理装置
US8639874B2 (en) * 2008-12-22 2014-01-28 International Business Machines Corporation Power management of a spare DRAM on a buffered DIMM by issuing a power on/off command to the DRAM device
JP5155221B2 (ja) 2009-03-11 2013-03-06 ルネサスエレクトロニクス株式会社 メモリ制御装置
US8489807B2 (en) * 2010-12-03 2013-07-16 International Business Machines Corporation Techniques for performing refresh operations in high-density memories
US8775725B2 (en) * 2010-12-06 2014-07-08 Intel Corporation Memory device refresh commands on the fly
US8539146B2 (en) * 2011-11-28 2013-09-17 International Business Machines Corporation Apparatus for scheduling memory refresh operations including power states
US9269418B2 (en) * 2012-02-06 2016-02-23 Arm Limited Apparatus and method for controlling refreshing of data in a DRAM
US8909874B2 (en) * 2012-02-13 2014-12-09 International Business Machines Corporation Memory reorder queue biasing preceding high latency operations
US9196347B2 (en) * 2013-03-14 2015-11-24 International Business Machines Corporation DRAM controller for variable refresh operation timing
CN104143355B (zh) * 2013-05-09 2018-01-23 华为技术有限公司 一种刷新动态随机存取存储器的方法和装置
CN108231109B (zh) * 2014-06-09 2021-01-29 华为技术有限公司 动态随机存取存储器dram的刷新方法、设备以及系统
US9685219B2 (en) * 2015-05-13 2017-06-20 Samsung Electronics Co., Ltd. Semiconductor memory device for deconcentrating refresh commands and system including the same
US9576637B1 (en) * 2016-05-25 2017-02-21 Advanced Micro Devices, Inc. Fine granularity refresh
CN106875971B (zh) * 2017-02-16 2021-01-22 上海兆芯集成电路有限公司 动态随机存取存储器控制器及其控制方法
JP6780897B2 (ja) 2017-04-14 2020-11-04 ホアウェイ・テクノロジーズ・カンパニー・リミテッド メモリリフレッシュ技術及びコンピュータシステム
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US10969997B2 (en) * 2018-11-07 2021-04-06 Intel Corporation Memory controller that filters a count of row activate commands collectively sent to a set of memory banks

Also Published As

Publication number Publication date
CA3058778A1 (en) 2018-10-18
BR112019021554A2 (pt) 2020-05-12
EP3605542B1 (en) 2021-07-21
JP2020517024A (ja) 2020-06-11
KR102258360B1 (ko) 2021-05-31
EP3605542A1 (en) 2020-02-05
BR112019021554B1 (pt) 2024-02-27
KR20190126888A (ko) 2019-11-12
AU2017409368B2 (en) 2022-07-07
US20200066330A1 (en) 2020-02-27
CA3058778C (en) 2023-02-21
CN110546707A (zh) 2019-12-06
WO2018188085A1 (zh) 2018-10-18
EP3605542A4 (en) 2020-05-20
AU2017409368A1 (en) 2019-10-24
CN110546707B (zh) 2021-10-19
JP7043515B2 (ja) 2022-03-29

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