SG11201804539YA - Method for double-side polishing wafer - Google Patents

Method for double-side polishing wafer

Info

Publication number
SG11201804539YA
SG11201804539YA SG11201804539YA SG11201804539YA SG11201804539YA SG 11201804539Y A SG11201804539Y A SG 11201804539YA SG 11201804539Y A SG11201804539Y A SG 11201804539YA SG 11201804539Y A SG11201804539Y A SG 11201804539YA SG 11201804539Y A SG11201804539Y A SG 11201804539YA
Authority
SG
Singapore
Prior art keywords
double
side polishing
polishing wafer
wafer
polishing
Prior art date
Application number
SG11201804539YA
Inventor
Yuki Tanaka
Daichi Kitazume
Syuichi Kobayashi
Original Assignee
Shin Etsu Handotai Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Shin Etsu Handotai Co Ltd filed Critical Shin Etsu Handotai Co Ltd
Publication of SG11201804539YA publication Critical patent/SG11201804539YA/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/304—Mechanical treatment, e.g. grinding, polishing, cutting
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/042—Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/042—Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor
    • B24B37/044—Lapping machines or devices; Accessories designed for working plane surfaces operating processes therefor characterised by the composition of the lapping agent
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/27—Work carriers
    • B24B37/28—Work carriers for double side lapping of plane surfaces
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3105—After-treatment
    • H01L21/31051—Planarisation of the insulating layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H01L21/3205—Deposition of non-insulating-, e.g. conductive- or resistive-, layers on insulating layers; After-treatment of these layers
    • H01L21/321—After treatment
    • H01L21/32115—Planarisation
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/324—Thermal treatment for modifying the properties of semiconductor bodies, e.g. annealing, sintering
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B27/00—Other grinding machines or devices
    • B24B27/0076—Other grinding machines or devices grinding machines comprising two or more grinding tools
    • B—PERFORMING OPERATIONS; TRANSPORTING
    • B24—GRINDING; POLISHING
    • B24B—MACHINES, DEVICES, OR PROCESSES FOR GRINDING OR POLISHING; DRESSING OR CONDITIONING OF ABRADING SURFACES; FEEDING OF GRINDING, POLISHING, OR LAPPING AGENTS
    • B24B37/00—Lapping machines or devices; Accessories
    • B24B37/04—Lapping machines or devices; Accessories designed for working plane surfaces
    • B24B37/07—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool
    • B24B37/08—Lapping machines or devices; Accessories designed for working plane surfaces characterised by the movement of the work or lapping tool for double side lapping
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02002—Preparing wafers
    • H01L21/02005—Preparing bulk and homogeneous wafers
    • H01L21/02008—Multistep processes
    • H01L21/0201—Specific process step
    • H01L21/02024—Mirror polishing

Landscapes

  • Engineering & Computer Science (AREA)
  • Mechanical Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Finish Polishing, Edge Sharpening, And Grinding By Specific Grinding Devices (AREA)
  • Mechanical Treatment Of Semiconductor (AREA)
SG11201804539YA 2015-12-11 2016-11-22 Method for double-side polishing wafer SG11201804539YA (en)

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
JP2015241964A JP6424809B2 (en) 2015-12-11 2015-12-11 Double sided polishing method of wafer
PCT/JP2016/004942 WO2017098691A1 (en) 2015-12-11 2016-11-22 Method for double-sided polishing of wafers

Publications (1)

Publication Number Publication Date
SG11201804539YA true SG11201804539YA (en) 2018-06-28

Family

ID=59013992

Family Applications (1)

Application Number Title Priority Date Filing Date
SG11201804539YA SG11201804539YA (en) 2015-12-11 2016-11-22 Method for double-side polishing wafer

Country Status (8)

Country Link
US (1) US11298796B2 (en)
JP (1) JP6424809B2 (en)
KR (1) KR102568201B1 (en)
CN (1) CN108290268B (en)
DE (1) DE112016005348T5 (en)
SG (1) SG11201804539YA (en)
TW (1) TWI700147B (en)
WO (1) WO2017098691A1 (en)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP6747599B2 (en) * 2017-08-31 2020-08-26 株式会社Sumco Double side polishing method for silicon wafer
JP6977657B2 (en) * 2018-05-08 2021-12-08 信越半導体株式会社 How to store carriers for double-sided polishing equipment and how to polish double-sided wafers
JP7435436B2 (en) 2020-12-24 2024-02-21 株式会社Sumco How to polish carrier plate

Family Cites Families (23)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS6190868A (en) * 1984-10-08 1986-05-09 Toshiba Corp Polishing unit
US6595831B1 (en) * 1996-05-16 2003-07-22 Ebara Corporation Method for polishing workpieces using fixed abrasives
EP1007703A1 (en) * 1996-12-27 2000-06-14 Sumitomo Chemical Company, Limited Methods of conferring ppo-inhibiting herbicide resistance to plants by gene manipulation
US5882245A (en) * 1997-02-28 1999-03-16 Advanced Ceramics Research, Inc. Polymer carrier gears for polishing of flat objects
CN1203530C (en) * 2000-04-24 2005-05-25 三菱住友硅晶株式会社 Method of manufacturing semiconductor wafer
US6454635B1 (en) * 2000-08-08 2002-09-24 Memc Electronic Materials, Inc. Method and apparatus for a wafer carrier having an insert
KR100832942B1 (en) * 2000-10-26 2008-05-27 신에츠 한도타이 가부시키가이샤 Wafer manufacturing method, polishing apparatus, and wafer
JP2004283929A (en) * 2003-03-20 2004-10-14 Shin Etsu Handotai Co Ltd Carrier for wafer holding, double side polishing device using it and double side polishing method of wafer
US20070184662A1 (en) * 2004-06-23 2007-08-09 Komatsu Denshi Kinzoku Kabushiki Kaisha Double-side polishing carrier and fabrication method thereof
JP2007021680A (en) 2005-07-19 2007-02-01 Shin Etsu Handotai Co Ltd Double-side lapping method for wafer
KR100898821B1 (en) * 2007-11-29 2009-05-22 주식회사 실트론 Method for manufacturing wafer carrier
JP4605233B2 (en) * 2008-02-27 2011-01-05 信越半導体株式会社 Carrier for double-side polishing apparatus, double-side polishing apparatus and double-side polishing method using the same
JP2010221362A (en) * 2009-03-24 2010-10-07 Showa Denko Kk Manufacturing method of disk shaped substrate
JP5233888B2 (en) * 2009-07-21 2013-07-10 信越半導体株式会社 Method for manufacturing carrier for double-side polishing apparatus, carrier for double-side polishing apparatus and double-side polishing method for wafer
KR101209271B1 (en) * 2009-08-21 2012-12-06 주식회사 엘지실트론 Apparatus for double side polishing and Carrier for double side polishing apparatus
SG185085A1 (en) * 2010-04-30 2012-12-28 Sumco Corp Method for polishing silicon wafer and polishing liquid therefor
DE102010032501B4 (en) * 2010-07-28 2019-03-28 Siltronic Ag Method and device for dressing the working layers of a double-side sanding device
US20130017765A1 (en) * 2011-07-11 2013-01-17 3M Innovative Properties Company Lapping carrier and method of using the same
JP5847789B2 (en) * 2013-02-13 2016-01-27 信越半導体株式会社 Method for manufacturing carrier for double-side polishing apparatus and double-side polishing method for wafer
DE102013202488B4 (en) * 2013-02-15 2015-01-22 Siltronic Ag Process for dressing polishing cloths for simultaneous two-sided polishing of semiconductor wafers
JP6244962B2 (en) * 2014-02-17 2017-12-13 株式会社Sumco Manufacturing method of semiconductor wafer
JP6056793B2 (en) * 2014-03-14 2017-01-11 信越半導体株式会社 Method for manufacturing carrier for double-side polishing apparatus and double-side polishing method
JP6443370B2 (en) * 2016-03-18 2018-12-26 信越半導体株式会社 Method for manufacturing carrier for double-side polishing apparatus and double-side polishing method for wafer

Also Published As

Publication number Publication date
TW201729938A (en) 2017-09-01
KR102568201B1 (en) 2023-08-18
TWI700147B (en) 2020-08-01
KR20180087275A (en) 2018-08-01
CN108290268B (en) 2020-12-11
WO2017098691A1 (en) 2017-06-15
DE112016005348T5 (en) 2018-08-02
US11298796B2 (en) 2022-04-12
JP2017104958A (en) 2017-06-15
CN108290268A (en) 2018-07-17
US20180272497A1 (en) 2018-09-27
JP6424809B2 (en) 2018-11-21

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