SG10201806580YA - Semiconductor Package And Method Of Fabricating The Same - Google Patents
Semiconductor Package And Method Of Fabricating The SameInfo
- Publication number
- SG10201806580YA SG10201806580YA SG10201806580YA SG10201806580YA SG10201806580YA SG 10201806580Y A SG10201806580Y A SG 10201806580YA SG 10201806580Y A SG10201806580Y A SG 10201806580YA SG 10201806580Y A SG10201806580Y A SG 10201806580YA SG 10201806580Y A SG10201806580Y A SG 10201806580YA
- Authority
- SG
- Singapore
- Prior art keywords
- semiconductor package
- fabricating
- same
- inorganic fillers
- semiconductor
- Prior art date
Links
- 239000004065 semiconductor Substances 0.000 title abstract 4
- 238000004519 manufacturing process Methods 0.000 title 1
- 239000011256 inorganic filler Substances 0.000 abstract 2
- 229910003475 inorganic filler Inorganic materials 0.000 abstract 2
- 239000000463 material Substances 0.000 abstract 2
- 239000004020 conductor Substances 0.000 abstract 1
- 239000002184 metal Substances 0.000 abstract 1
- 229920006254 polymer film Polymers 0.000 abstract 1
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- H01L23/5389—Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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- H01L23/485—Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of lead-in layers inseparably applied to the semiconductor body consisting of layered constructions comprising conductive layers and insulating layers, e.g. planar contacts
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- G03—PHOTOGRAPHY; CINEMATOGRAPHY; ANALOGOUS TECHNIQUES USING WAVES OTHER THAN OPTICAL WAVES; ELECTROGRAPHY; HOLOGRAPHY
- G03F—PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR
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- H01L2224/161—Disposition
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- H01L2224/81—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector
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- H01L2224/81005—Methods for connecting semiconductor or other solid state bodies using means for bonding being attached to, or being formed on, the surface to be connected using a bump connector involving a temporary auxiliary member not forming part of the bonding apparatus being a temporary or sacrificial substrate
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- H01L2225/1058—Bump or bump-like electrical connections, e.g. balls, pillars, posts
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- H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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- H01L23/3128—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed a substrate forming part of the encapsulation the substrate having spherical bumps for external connection
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- H01L24/02—Bonding areas ; Manufacturing methods related thereto
- H01L24/04—Structure, shape, material or disposition of the bonding areas prior to the connecting process
- H01L24/05—Structure, shape, material or disposition of the bonding areas prior to the connecting process of an individual bonding area
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- H01L24/13—Structure, shape, material or disposition of the bump connectors prior to the connecting process of an individual bump connector
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- H01L24/10—Bump connectors ; Manufacturing methods related thereto
- H01L24/15—Structure, shape, material or disposition of the bump connectors after the connecting process
- H01L24/16—Structure, shape, material or disposition of the bump connectors after the connecting process of an individual bump connector
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- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/151—Die mounting substrate
- H01L2924/153—Connection portion
- H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
- H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Power Engineering (AREA)
- Computer Hardware Design (AREA)
- Physics & Mathematics (AREA)
- General Physics & Mathematics (AREA)
- Condensed Matter Physics & Semiconductors (AREA)
- Manufacturing & Machinery (AREA)
- Ceramic Engineering (AREA)
- Geometry (AREA)
- Production Of Multi-Layered Print Wiring Board (AREA)
- Internal Circuitry In Semiconductor Integrated Circuit Devices (AREA)
- Structures Or Materials For Encapsulating Or Coating Semiconductor Devices Or Solid State Devices (AREA)
Abstract
Insulating layers of a redistribution layer of a semiconductor package may be formed as a polymer film having inorganic fillers formed therein. The inorganic fillers may trap reactive materials to inhibit and/or substantially prevent the metal conductors, 5 such as chip pads of the semiconductor chip being packaged, from being damaged by the reactive material. As a result, the reliability and the durability of the semiconductor package may be improved. Fig. 6A 10
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US11705414B2 (en) * | 2017-10-05 | 2023-07-18 | Texas Instruments Incorporated | Structure and method for semiconductor packaging |
KR20210134687A (en) | 2019-02-28 | 2021-11-10 | 스미또모 가가꾸 가부시키가이샤 | Cyan colored curable composition |
US10978117B2 (en) | 2019-03-26 | 2021-04-13 | Micron Technology, Inc. | Centralized placement of command and address swapping in memory devices |
US10811057B1 (en) | 2019-03-26 | 2020-10-20 | Micron Technology, Inc. | Centralized placement of command and address in memory devices |
US10811059B1 (en) | 2019-03-27 | 2020-10-20 | Micron Technology, Inc. | Routing for power signals including a redistribution layer |
US11031335B2 (en) | 2019-04-03 | 2021-06-08 | Micron Technology, Inc. | Semiconductor devices including redistribution layers |
KR102653499B1 (en) | 2019-06-28 | 2024-03-29 | 삼성전자주식회사 | Semiconductor package |
US11476211B2 (en) | 2019-12-19 | 2022-10-18 | Nepes Co., Ltd. | Semiconductor package and manufacturing method thereof |
KR102589841B1 (en) * | 2019-12-19 | 2023-10-16 | 주식회사 네패스 | Semiconductor package and manufacturing method thereof |
WO2021161498A1 (en) * | 2020-02-14 | 2021-08-19 | 太陽誘電株式会社 | Component module |
CN111554641A (en) | 2020-05-11 | 2020-08-18 | 上海天马微电子有限公司 | Semiconductor package and manufacturing method thereof |
US11715755B2 (en) | 2020-06-15 | 2023-08-01 | Taiwan Semiconductor Manufacturing Co., Ltd. | Structure and method for forming integrated high density MIM capacitor |
KR20220026809A (en) * | 2020-08-26 | 2022-03-07 | 삼성전자주식회사 | Semiconductor package |
US20220068742A1 (en) * | 2020-08-27 | 2022-03-03 | Unimicron Technology Corp. | Chip package and method of manufacturing the same |
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US11817392B2 (en) * | 2020-09-28 | 2023-11-14 | Taiwan Semiconductor Manufacturing Co., Ltd. | Integrated circuit |
US20230049123A1 (en) * | 2021-08-10 | 2023-02-16 | Innolux Corporation | Electronic device and manufacturing method and inspection method thereof |
CN115831923A (en) * | 2021-09-17 | 2023-03-21 | 群创光电股份有限公司 | Electronic device and manufacturing method thereof |
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JP2002151551A (en) | 2000-11-10 | 2002-05-24 | Hitachi Ltd | Flip-chip mounting structure, semiconductor device therewith and mounting method |
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KR20160132751A (en) * | 2015-05-11 | 2016-11-21 | 삼성전기주식회사 | Electronic component package and method of manufacturing the same |
JP2017034192A (en) | 2015-08-05 | 2017-02-09 | 株式会社東芝 | Semiconductor device and method of manufacturing the same |
KR102104806B1 (en) | 2016-01-29 | 2020-04-27 | 후지필름 가부시키가이샤 | Photosensitive resin composition, cured film, laminate, manufacturing method of cured film, manufacturing method of laminate, and semiconductor device |
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US20170365567A1 (en) | 2016-06-20 | 2017-12-21 | Samsung Electro-Mechanics Co., Ltd. | Fan-out semiconductor package |
US10128193B2 (en) * | 2016-11-29 | 2018-11-13 | Taiwan Semiconductor Manufacturing Co., Ltd. | Package structure and method for forming the same |
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US10964643B2 (en) | 2021-03-30 |
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