SG10201506817WA - Thin 3d fan-out embedded wafer level package (ewlb) for application processor and memory integration - Google Patents

Thin 3d fan-out embedded wafer level package (ewlb) for application processor and memory integration

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Publication number
SG10201506817WA
SG10201506817WA SG10201506817WA SG10201506817WA SG10201506817WA SG 10201506817W A SG10201506817W A SG 10201506817WA SG 10201506817W A SG10201506817W A SG 10201506817WA SG 10201506817W A SG10201506817W A SG 10201506817WA SG 10201506817W A SG10201506817W A SG 10201506817WA
Authority
SG
Singapore
Prior art keywords
ewlb
fan
thin
application processor
wafer level
Prior art date
Application number
SG10201506817WA
Inventor
Rajendra D Pendse
Original Assignee
Stats Chippac Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stats Chippac Ltd filed Critical Stats Chippac Ltd
Publication of SG10201506817WA publication Critical patent/SG10201506817WA/en

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Families Citing this family (45)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9881894B2 (en) * 2012-03-08 2018-01-30 STATS ChipPAC Pte. Ltd. Thin 3D fan-out embedded wafer level package (EWLB) for application processor and memory integration
US9613917B2 (en) 2012-03-30 2017-04-04 Taiwan Semiconductor Manufacturing Company, Ltd. Package-on-package (PoP) device with integrated passive device in a via
US9165887B2 (en) 2012-09-10 2015-10-20 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor device with discrete blocks
US8975726B2 (en) 2012-10-11 2015-03-10 Taiwan Semiconductor Manufacturing Company, Ltd. POP structures and methods of forming the same
US9391041B2 (en) 2012-10-19 2016-07-12 Taiwan Semiconductor Manufacturing Company, Ltd. Fan-out wafer level package structure
US8866286B2 (en) * 2012-12-13 2014-10-21 Zhuhai Advanced Chip Carriers & Electronic Substrate Solutions Technologies Co. Ltd. Single layer coreless substrate
US9679839B2 (en) * 2013-10-30 2017-06-13 Taiwan Semiconductor Manufacturing Company, Ltd. Chip on package structure and method
US9373527B2 (en) 2013-10-30 2016-06-21 Taiwan Semiconductor Manufacturing Company, Ltd. Chip on package structure and method
JP2015126121A (en) * 2013-12-26 2015-07-06 日東電工株式会社 Semiconductor package manufacturing method
US9653442B2 (en) * 2014-01-17 2017-05-16 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit package and methods of forming same
CN103745936B (en) * 2014-02-08 2016-08-17 华进半导体封装先导技术研发中心有限公司 The manufacture method of fan-out square chip level package
CN104064551B (en) 2014-06-05 2018-01-16 华为技术有限公司 A kind of chip stack package structure and electronic equipment
EP3163607A4 (en) * 2014-06-26 2018-03-07 Toppan Printing Co., Ltd. Wiring board, semiconductor device and method for manufacturing semiconductor device
EP3175481B1 (en) * 2014-07-28 2021-07-21 Intel Corporation A multi-chip-module semiconductor chip package having dense package wiring
US9548289B2 (en) * 2014-09-15 2017-01-17 Mediatek Inc. Semiconductor package assemblies with system-on-chip (SOC) packages
US9679842B2 (en) * 2014-10-01 2017-06-13 Mediatek Inc. Semiconductor package assembly
US9659863B2 (en) * 2014-12-01 2017-05-23 Taiwan Semiconductor Manufacturing Company, Ltd. Semiconductor devices, multi-die packages, and methods of manufacture thereof
EP3073527A1 (en) * 2015-03-17 2016-09-28 MediaTek, Inc Semiconductor package assembly
TWI623067B (en) * 2015-03-17 2018-05-01 聯發科技股份有限公司 Semiconductor package, semiconductor package assembly and a method for fabricating a semiconductor package
BR112017018820A2 (en) 2015-04-14 2018-04-24 Huawei Technologies Co., Ltd. A chip
US9401350B1 (en) * 2015-07-29 2016-07-26 Qualcomm Incorporated Package-on-package (POP) structure including multiple dies
CN105070671B (en) * 2015-09-10 2019-05-10 中芯长电半导体(江阴)有限公司 A kind of chip packaging method
US9761571B2 (en) * 2015-09-17 2017-09-12 Deca Technologies Inc. Thermally enhanced fully molded fan-out module
US10483250B2 (en) * 2015-11-04 2019-11-19 Intel Corporation Three-dimensional small form factor system in package architecture
US11037904B2 (en) 2015-11-24 2021-06-15 Taiwan Semiconductor Manufacturing Company, Ltd. Singulation and bonding methods and structures formed thereby
US10361140B2 (en) 2016-06-10 2019-07-23 International Business Machines Corporation Wafer stacking for integrated circuit manufacturing
TW202404049A (en) * 2016-12-14 2024-01-16 成真股份有限公司 Logic drive based on standard commodity fpga ic chips
CN106684066B (en) 2016-12-30 2020-03-10 华为技术有限公司 Packaged chip and signal transmission method based on packaged chip
US20190013283A1 (en) * 2017-07-10 2019-01-10 Powertech Technology Inc. Semiconductor package and manufacturing method thereof
US10957679B2 (en) * 2017-08-08 2021-03-23 iCometrue Company Ltd. Logic drive based on standardized commodity programmable logic semiconductor IC chips
US20190067145A1 (en) * 2017-08-22 2019-02-28 Micron Technology, Inc. Semiconductor device
US10535636B2 (en) 2017-11-15 2020-01-14 Taiwan Semiconductor Manufacturing Company, Ltd. Integrating passive devices in package structures
DE102018124695A1 (en) 2017-11-15 2019-05-16 Taiwan Semiconductor Manufacturing Co., Ltd. Integrate passive devices in package structures
CN108962772B (en) * 2018-07-19 2021-01-22 通富微电子股份有限公司 Package structure and method for forming the same
CN109037082B (en) * 2018-07-19 2021-01-22 通富微电子股份有限公司 Package structure and method for forming the same
CN108962766B (en) * 2018-07-19 2021-01-22 通富微电子股份有限公司 Package structure and method for forming the same
US11043420B2 (en) * 2018-09-28 2021-06-22 Semiconductor Components Industries, Llc Fan-out wafer level packaging of semiconductor devices
US11037933B2 (en) * 2019-07-29 2021-06-15 Nanya Technology Corporation Semiconductor device with selectively formed insulating segments and method for fabricating the same
US10886236B1 (en) * 2019-08-19 2021-01-05 Nanya Technology Corporation Interconnect structure
US11621244B2 (en) * 2019-11-15 2023-04-04 Taiwan Semiconductor Manufacturing Company, Ltd. Integrated circuit package and method
US11404380B2 (en) 2019-12-19 2022-08-02 Advanced Semiconductor Engineering, Inc. Semiconductor package structure and method for manufacturing the same
KR20210093612A (en) 2020-01-20 2021-07-28 삼성전자주식회사 Semiconductor package with barrier layer
DE102020122662A1 (en) 2020-08-31 2022-03-03 Infineon Technologies Ag Bending semiconductor chip for connection at different vertical planes
JP2022109724A (en) * 2021-01-15 2022-07-28 ローム株式会社 Semiconductor light-emitting device
EP4307023A1 (en) * 2022-07-11 2024-01-17 AT & S Austria Technologie & Systemtechnik Aktiengesellschaft Package having component carrier and embedded optical and electric chips with horizontal signal path in between

Family Cites Families (39)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2868167B2 (en) * 1991-08-05 1999-03-10 インターナショナル・ビジネス・マシーンズ・コーポレイション Multi-level high density interconnect structures and high density interconnect structures
JP3245308B2 (en) 1994-08-26 2002-01-15 日本碍子株式会社 Method for manufacturing semiconductor device
US5834374A (en) * 1994-09-30 1998-11-10 International Business Machines Corporation Method for controlling tensile and compressive stresses and mechanical problems in thin films on substrates
US6013948A (en) * 1995-11-27 2000-01-11 Micron Technology, Inc. Stackable chip scale semiconductor package with mating contacts on opposed surfaces
US5841193A (en) * 1996-05-20 1998-11-24 Epic Technologies, Inc. Single chip modules, repairable multichip modules, and methods of fabrication thereof
US7122904B2 (en) 2002-04-25 2006-10-17 Macronix International Co., Ltd. Semiconductor packaging device and manufacture thereof
JP4297652B2 (en) 2002-07-03 2009-07-15 新光電気工業株式会社 Manufacturing method of semiconductor device
JP4204989B2 (en) * 2004-01-30 2009-01-07 新光電気工業株式会社 Semiconductor device and manufacturing method thereof
TWI229433B (en) 2004-07-02 2005-03-11 Phoenix Prec Technology Corp Direct connection multi-chip semiconductor element structure
US7417290B2 (en) 2006-01-09 2008-08-26 International Business Machines Corporation Air break for improved silicide formation with composite caps
JP4899603B2 (en) * 2006-04-13 2012-03-21 ソニー株式会社 Three-dimensional semiconductor package manufacturing method
JP4956128B2 (en) * 2006-10-02 2012-06-20 ルネサスエレクトロニクス株式会社 Manufacturing method of electronic device
US7812459B2 (en) * 2006-12-19 2010-10-12 Taiwan Semiconductor Manufacturing Company, Ltd. Three-dimensional integrated circuits with protection layers
KR100871382B1 (en) 2007-06-26 2008-12-02 주식회사 하이닉스반도체 Through silicon via stack package and method for manufacturing of the same
US7800211B2 (en) * 2007-06-29 2010-09-21 Stats Chippac, Ltd. Stackable package by using internal stacking modules
KR101538648B1 (en) * 2007-07-31 2015-07-22 인벤사스 코포레이션 Semiconductor packaging process using through silicon vias
KR101430166B1 (en) 2007-08-06 2014-08-13 삼성전자주식회사 Multi-stacked memory device
US8546189B2 (en) * 2008-09-22 2013-10-01 Stats Chippac, Ltd. Semiconductor device and method of forming a wafer level package with top and bottom solder bump interconnection
US7858441B2 (en) 2008-12-08 2010-12-28 Stats Chippac, Ltd. Semiconductor package with semiconductor core structure and method of forming same
US8110440B2 (en) * 2009-05-18 2012-02-07 Stats Chippac, Ltd. Semiconductor device and method of forming overlapping semiconductor die with coplanar vertical interconnect structure
US20110014746A1 (en) * 2009-07-17 2011-01-20 Stats Chippac, Ltd. Semiconductor Device and Method of Forming Conductive TSV in Peripheral Region of Die Prior to Wafer Singulaton
US8367470B2 (en) 2009-08-07 2013-02-05 Stats Chippac, Ltd. Semiconductor device and method of forming cavity in build-up interconnect structure for short signal path between die
US8039304B2 (en) 2009-08-12 2011-10-18 Stats Chippac, Ltd. Semiconductor device and method of dual-molding die formed on opposite sides of build-up interconnect structures
US8436255B2 (en) * 2009-12-31 2013-05-07 Stmicroelectronics Pte Ltd. Fan-out wafer level package with polymeric layer for high reliability
US8372689B2 (en) 2010-01-21 2013-02-12 Advanced Semiconductor Engineering, Inc. Wafer-level semiconductor device packages with three-dimensional fan-out and manufacturing methods thereof
US20110186960A1 (en) 2010-02-03 2011-08-04 Albert Wu Techniques and configurations for recessed semiconductor substrates
US8193040B2 (en) * 2010-02-08 2012-06-05 Infineon Technologies Ag Manufacturing of a device including a semiconductor chip
KR20110123297A (en) * 2010-05-07 2011-11-15 주식회사 네패스 Wafer level semiconductor package and fabrication method thereof
US9048233B2 (en) 2010-05-26 2015-06-02 Taiwan Semiconductor Manufacturing Company, Ltd. Package systems having interposers
US8426961B2 (en) * 2010-06-25 2013-04-23 Taiwan Semiconductor Manufacturing Company, Ltd. Embedded 3D interposer structure
JP5573422B2 (en) 2010-06-29 2014-08-20 富士通株式会社 Manufacturing method of semiconductor device
KR101678539B1 (en) 2010-07-21 2016-11-23 삼성전자 주식회사 Stack package, semiconductor package and method of manufacturing the stack package
US8288201B2 (en) 2010-08-25 2012-10-16 Stats Chippac, Ltd. Semiconductor device and method of forming FO-WLCSP with discrete semiconductor components mounted under and over semiconductor die
US9224647B2 (en) 2010-09-24 2015-12-29 Stats Chippac, Ltd. Semiconductor device and method of forming TSV interposer with semiconductor die and build-up interconnect structure on opposing surfaces of the interposer
US9167694B2 (en) 2010-11-02 2015-10-20 Georgia Tech Research Corporation Ultra-thin interposer assemblies with through vias
US8648470B2 (en) 2011-01-21 2014-02-11 Stats Chippac, Ltd. Semiconductor device and method of forming FO-WLCSP with multiple encapsulants
US8268677B1 (en) 2011-03-08 2012-09-18 Stats Chippac, Ltd. Semiconductor device and method of forming shielding layer over semiconductor die mounted to TSV interposer
US8704384B2 (en) * 2012-02-17 2014-04-22 Xilinx, Inc. Stacked die assembly
US9881894B2 (en) * 2012-03-08 2018-01-30 STATS ChipPAC Pte. Ltd. Thin 3D fan-out embedded wafer level package (EWLB) for application processor and memory integration

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