SG10201403211QA - Semiconductor device and method of stacking semiconductordie on a fan-out wlcsp - Google Patents

Semiconductor device and method of stacking semiconductordie on a fan-out wlcsp

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Publication number
SG10201403211QA
SG10201403211QA SG10201403211QA SG10201403211QA SG10201403211QA SG 10201403211Q A SG10201403211Q A SG 10201403211QA SG 10201403211Q A SG10201403211Q A SG 10201403211QA SG 10201403211Q A SG10201403211Q A SG 10201403211QA SG 10201403211Q A SG10201403211Q A SG 10201403211QA
Authority
SG
Singapore
Prior art keywords
semiconductor die
interconnect structure
semiconductor
semiconductor device
semiconductordie
Prior art date
Application number
SG10201403211QA
Other languages
English (en)
Inventor
Xusheng Bao
Kwokkeung Szeto
Original Assignee
Stats Chippac Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Stats Chippac Ltd filed Critical Stats Chippac Ltd
Publication of SG10201403211QA publication Critical patent/SG10201403211QA/en

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    • H01L23/488Arrangements for conducting electric current to or from the solid state body in operation, e.g. leads, terminal arrangements ; Selection of materials therefor consisting of soldered or bonded constructions
    • H01L23/498Leads, i.e. metallisations or lead-frames on insulating substrates, e.g. chip carriers
    • H01L23/49811Additional leads joined to the metallisation on the insulating substrate, e.g. pins, bumps, wires, flat leads
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    • H01L23/5389Arrangements for conducting electric current within the device in operation from one component to another, i.e. interconnections, e.g. wires, lead frames the interconnection structure between a plurality of semiconductor chips being formed on, or in, insulating substrates the chips being integrally enclosed by the interconnect and support structures
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Families Citing this family (19)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
TWI555166B (zh) * 2013-06-18 2016-10-21 矽品精密工業股份有限公司 層疊式封裝件及其製法
US20160013076A1 (en) * 2014-07-14 2016-01-14 Michael B. Vincent Three dimensional package assemblies and methods for the production thereof
US9633974B2 (en) * 2015-03-04 2017-04-25 Apple Inc. System in package fan out stacking architecture and process flow
US11056373B2 (en) 2015-07-21 2021-07-06 Apple Inc. 3D fanout stacking
CN106449420B (zh) * 2015-08-05 2019-06-21 凤凰先驱股份有限公司 嵌埋式封装结构及其制造方法
TWI582933B (zh) * 2015-08-05 2017-05-11 恆勁科技股份有限公司 嵌埋式封裝結構的製造方法
US10049953B2 (en) * 2015-09-21 2018-08-14 Taiwan Semiconductor Manufacturing Company, Ltd. Method of manufacturing an integrated fan-out package having fan-out redistribution layer (RDL) to accommodate electrical connectors
WO2017108121A1 (en) * 2015-12-23 2017-06-29 Intel IP Corporation Semiconductor die package with more than one hanging die
US10049893B2 (en) * 2016-05-11 2018-08-14 Advanced Semiconductor Engineering, Inc. Semiconductor device with a conductive post
US11257724B2 (en) 2016-08-08 2022-02-22 Semiconductor Components Industries, Llc Semiconductor wafer and method of probe testing
US9793186B1 (en) 2016-08-08 2017-10-17 Semiconductor Components Industries, Llc Semiconductor wafer and method of backside probe testing through opening in film frame
US10461000B2 (en) * 2016-08-08 2019-10-29 Semiconductor Components Industries, Llc Semiconductor wafer and method of probe testing
US11075129B2 (en) 2016-08-08 2021-07-27 Semiconductor Components Industries, Llc Substrate processing carrier
WO2018125202A1 (en) * 2016-12-30 2018-07-05 Intel IP Corporation Interconnect structure for stacked die in a microelectronic device
WO2020036631A2 (en) * 2018-03-06 2020-02-20 The Regents Of The University Of California Network on interconnect fabric
CN109599390A (zh) * 2018-12-29 2019-04-09 华进半导体封装先导技术研发中心有限公司 一种扇出型封装结构和封装方法
US11239173B2 (en) * 2019-03-28 2022-02-01 Taiwan Semiconductor Manufacturing Co., Ltd. Structure and formation method of chip package with fan-out feature
KR20220109753A (ko) * 2021-01-29 2022-08-05 삼성전자주식회사 포스트를 포함하는 반도체 패키지
US11694876B2 (en) 2021-12-08 2023-07-04 Applied Materials, Inc. Apparatus and method for delivering a plurality of waveform signals during plasma processing

Family Cites Families (16)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP3772066B2 (ja) * 2000-03-09 2006-05-10 沖電気工業株式会社 半導体装置
US6847105B2 (en) * 2001-09-21 2005-01-25 Micron Technology, Inc. Bumping technology in stacked die configurations
US6987031B2 (en) * 2002-08-27 2006-01-17 Micron Technology, Inc. Multiple chip semiconductor package and method of fabricating same
JP2004140037A (ja) * 2002-10-15 2004-05-13 Oki Electric Ind Co Ltd 半導体装置、及びその製造方法
US8076232B2 (en) * 2008-04-03 2011-12-13 Stats Chippac, Ltd. Semiconductor device and method of forming composite bump-on-lead interconnection
JP4851794B2 (ja) * 2006-01-10 2012-01-11 カシオ計算機株式会社 半導体装置
US8124471B2 (en) * 2008-03-11 2012-02-28 Intel Corporation Method of post-mold grinding a semiconductor package
US8383457B2 (en) * 2010-09-03 2013-02-26 Stats Chippac, Ltd. Semiconductor device and method of forming interposer frame over semiconductor die to provide vertical interconnect
US8642381B2 (en) * 2010-07-16 2014-02-04 Stats Chippac, Ltd. Semiconductor device and method of forming protective layer over exposed surfaces of semiconductor die
US8076184B1 (en) * 2010-08-16 2011-12-13 Stats Chippac, Ltd. Semiconductor device and method of forming wafer-level multi-row etched leadframe with base leads and embedded semiconductor die
US8288201B2 (en) 2010-08-25 2012-10-16 Stats Chippac, Ltd. Semiconductor device and method of forming FO-WLCSP with discrete semiconductor components mounted under and over semiconductor die
US8354297B2 (en) 2010-09-03 2013-01-15 Stats Chippac, Ltd. Semiconductor device and method of forming different height conductive pillars to electrically interconnect stacked laterally offset semiconductor die
GB2485830A (en) * 2010-11-26 2012-05-30 Cambridge Silicon Radio Ltd Stacked multi-chip package using encapsulated electroplated pillar conductors; also able to include MEMS elements
US20130069230A1 (en) * 2011-09-16 2013-03-21 Nagesh Vodrahalli Electronic assembly apparatus and associated methods
TWI590399B (zh) * 2012-04-02 2017-07-01 矽品精密工業股份有限公司 半導體封裝件及其製法與其封裝基板
US9385006B2 (en) 2012-06-21 2016-07-05 STATS ChipPAC Pte. Ltd. Semiconductor device and method of forming an embedded SOP fan-out package

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