SE9704627D0 - I/O-Processor - Google Patents
I/O-ProcessorInfo
- Publication number
- SE9704627D0 SE9704627D0 SE9704627A SE9704627A SE9704627D0 SE 9704627 D0 SE9704627 D0 SE 9704627D0 SE 9704627 A SE9704627 A SE 9704627A SE 9704627 A SE9704627 A SE 9704627A SE 9704627 D0 SE9704627 D0 SE 9704627D0
- Authority
- SE
- Sweden
- Prior art keywords
- pins
- processor
- processor core
- core
- chip
- Prior art date
Links
Classifications
-
- G—PHYSICS
- G06—COMPUTING; CALCULATING OR COUNTING
- G06F—ELECTRIC DIGITAL DATA PROCESSING
- G06F13/00—Interconnection of, or transfer of information or other signals between, memories, input/output devices or central processing units
- G06F13/10—Program control for peripheral devices
- G06F13/12—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor
- G06F13/124—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine
- G06F13/126—Program control for peripheral devices using hardware independent of the central processor, e.g. channel or peripheral processor where hardware is a sequential transfer control unit, e.g. microprocessor, peripheral processor or state-machine and has means for transferring I/O instructions and statuses between control unit and main processor
Landscapes
- Engineering & Computer Science (AREA)
- Theoretical Computer Science (AREA)
- Computer Hardware Design (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Physics & Mathematics (AREA)
- General Engineering & Computer Science (AREA)
- General Physics & Mathematics (AREA)
- Information Transfer Systems (AREA)
- Bus Control (AREA)
Priority Applications (4)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9704627A SE520126C2 (sv) | 1997-12-11 | 1997-12-11 | I/U-Processor och metod för styrning av periferienheter |
US09/204,212 US6189052B1 (en) | 1997-12-11 | 1998-12-02 | On-chip i/o processor supporting different protocols having on-chip controller for reading and setting pins, starting timers, and generating interrupts at well defined points of time |
JP10352666A JPH11238028A (ja) | 1997-12-11 | 1998-12-11 | 入出力プロセッサ |
JP2009259255A JP2010033614A (ja) | 1997-12-11 | 2009-11-12 | 入出力プロセッサ |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
SE9704627A SE520126C2 (sv) | 1997-12-11 | 1997-12-11 | I/U-Processor och metod för styrning av periferienheter |
Publications (3)
Publication Number | Publication Date |
---|---|
SE9704627D0 true SE9704627D0 (sv) | 1997-12-11 |
SE9704627L SE9704627L (sv) | 1999-06-12 |
SE520126C2 SE520126C2 (sv) | 2003-05-27 |
Family
ID=20409354
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
SE9704627A SE520126C2 (sv) | 1997-12-11 | 1997-12-11 | I/U-Processor och metod för styrning av periferienheter |
Country Status (3)
Country | Link |
---|---|
US (1) | US6189052B1 (sv) |
JP (2) | JPH11238028A (sv) |
SE (1) | SE520126C2 (sv) |
Families Citing this family (25)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
GB9805486D0 (en) * | 1998-03-13 | 1998-05-13 | Sgs Thomson Microelectronics | Adapter |
US6738821B1 (en) * | 1999-01-26 | 2004-05-18 | Adaptec, Inc. | Ethernet storage protocol networks |
US6532533B1 (en) * | 1999-11-29 | 2003-03-11 | Texas Instruments Incorporated | Input/output system with mask register bit control of memory mapped access to individual input/output pins |
DE10056198A1 (de) * | 2000-11-13 | 2002-02-14 | Infineon Technologies Ag | Kommunikationssystem zum Austausch von Daten unter Verwendung eines zusätzlichen Prozessors |
JP4832635B2 (ja) * | 2000-12-05 | 2011-12-07 | インターナショナル・ビジネス・マシーンズ・コーポレーション | データ伝送システム、データ伝送方法、データ記録装置およびコンピュータシステム |
US7032038B1 (en) * | 2001-03-22 | 2006-04-18 | Xilinx, Inc. | Configurable peripheral devices |
US6961790B2 (en) * | 2001-06-29 | 2005-11-01 | Motorola, Inc. | Self-extracting re-configurable interface used in modular electronic architecture |
US7318112B2 (en) * | 2001-10-11 | 2008-01-08 | Texas Instruments Incorporated | Universal interface simulating multiple interface protocols |
US7543085B2 (en) * | 2002-11-20 | 2009-06-02 | Intel Corporation | Integrated circuit having multiple modes of operation |
US7206989B2 (en) * | 2002-11-20 | 2007-04-17 | Intel Corporation | Integrated circuit having multiple modes of operation |
US7093033B2 (en) * | 2003-05-20 | 2006-08-15 | Intel Corporation | Integrated circuit capable of communicating using different communication protocols |
US7502883B2 (en) * | 2003-07-23 | 2009-03-10 | Silicon Labs Cp, Inc. | USB integrated module |
US7506133B2 (en) * | 2003-08-20 | 2009-03-17 | Seiko Epson Corporation | Method and apparatus for high speed addressing of a memory space from a relatively small address space |
GB2411013B (en) * | 2004-02-10 | 2006-05-31 | Sendo Int Ltd | Electronic device and methods of interrupting a processor therein |
US20050210166A1 (en) * | 2004-03-17 | 2005-09-22 | Raymond Chow | Dual function busy pin |
US7484027B1 (en) * | 2004-09-20 | 2009-01-27 | Cypress Semiconductor Corporation | Apparatus and method for configurable device pins |
US8719112B2 (en) * | 2009-11-24 | 2014-05-06 | Microsoft Corporation | Invocation of accessory-specific user experience |
US7865629B1 (en) * | 2009-11-24 | 2011-01-04 | Microsoft Corporation | Configurable connector for system-level communication |
CN103329115B (zh) * | 2010-10-04 | 2015-12-16 | 阿沃森特亨茨维尔公司 | 具有通信协议自动感测特征的远程访问装置 |
US9870337B2 (en) * | 2013-02-28 | 2018-01-16 | E3 Embedded Systems, Llc | Method and apparatus for the processor independent embedded platform |
IN2014DE02931A (sv) | 2013-11-01 | 2015-06-26 | Seiko Epson Corp | |
CN104615388B (zh) * | 2013-11-01 | 2017-12-22 | 精工爱普生株式会社 | 打印控制系统 |
DE102015119202A1 (de) | 2015-05-11 | 2016-11-17 | Dspace Digital Signal Processing And Control Engineering Gmbh | Schnittstelleneinheit zur Weiterleitung priorisierter Eingangsdaten an einen Prozessor |
GB202100601D0 (en) * | 2021-01-18 | 2021-03-03 | Raspberry Pi Trading Ltd | Interface and microcontroller |
EP4187395A1 (de) * | 2021-11-26 | 2023-05-31 | Göpel electronic GmbH | Verfahren und einrichtung zur emulation von übertragungsprotokollen zur ansteuerung von elektronischen bausteinen an einem bussystem |
Family Cites Families (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS6379444A (ja) * | 1986-04-30 | 1988-04-09 | Toshiba Corp | シリアルデ−タ受信装置 |
US5426759A (en) * | 1989-12-21 | 1995-06-20 | Microchip Technology Incorporated | On-chip/off-chip memory switching using system configuration bit |
JPH0438154A (ja) * | 1990-05-31 | 1992-02-07 | Honda Motor Co Ltd | 円筒状電機子巻線の製造方法 |
JPH04205192A (ja) * | 1990-11-30 | 1992-07-27 | Hitachi Ltd | 半導体集積回路 |
US5423014A (en) * | 1991-10-29 | 1995-06-06 | Intel Corporation | Instruction fetch unit with early instruction fetch mechanism |
JP2864824B2 (ja) * | 1991-12-19 | 1999-03-08 | ヤマハ株式会社 | データ伝送速度変換装置 |
US5535417A (en) * | 1993-09-27 | 1996-07-09 | Hitachi America, Inc. | On-chip DMA controller with host computer interface employing boot sequencing and address generation schemes |
-
1997
- 1997-12-11 SE SE9704627A patent/SE520126C2/sv not_active IP Right Cessation
-
1998
- 1998-12-02 US US09/204,212 patent/US6189052B1/en not_active Expired - Lifetime
- 1998-12-11 JP JP10352666A patent/JPH11238028A/ja not_active Withdrawn
-
2009
- 2009-11-12 JP JP2009259255A patent/JP2010033614A/ja active Pending
Also Published As
Publication number | Publication date |
---|---|
JPH11238028A (ja) | 1999-08-31 |
JP2010033614A (ja) | 2010-02-12 |
SE520126C2 (sv) | 2003-05-27 |
US6189052B1 (en) | 2001-02-13 |
SE9704627L (sv) | 1999-06-12 |
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Legal Events
Date | Code | Title | Description |
---|---|---|---|
NUG | Patent has lapsed |