SE9702762D0 - Metod vid processor samt processor anpassad att verka enligt den angivna metoden - Google Patents

Metod vid processor samt processor anpassad att verka enligt den angivna metoden

Info

Publication number
SE9702762D0
SE9702762D0 SE9702762A SE9702762A SE9702762D0 SE 9702762 D0 SE9702762 D0 SE 9702762D0 SE 9702762 A SE9702762 A SE 9702762A SE 9702762 A SE9702762 A SE 9702762A SE 9702762 D0 SE9702762 D0 SE 9702762D0
Authority
SE
Sweden
Prior art keywords
processor
read
instructions
instruction buffer
operate according
Prior art date
Application number
SE9702762A
Other languages
English (en)
Other versions
SE9702762L (sv
SE510295C2 (sv
Inventor
Carl Tobias Roos
Original Assignee
Ericsson Telefon Ab L M
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Ericsson Telefon Ab L M filed Critical Ericsson Telefon Ab L M
Priority to SE9702762A priority Critical patent/SE510295C2/sv
Publication of SE9702762D0 publication Critical patent/SE9702762D0/sv
Priority to KR1020007000634A priority patent/KR20010022065A/ko
Priority to AU83652/98A priority patent/AU8365298A/en
Priority to CN98809339A priority patent/CN1271434A/zh
Priority to PCT/SE1998/001334 priority patent/WO1999004335A2/en
Priority to EP98934048A priority patent/EP0998701A2/en
Priority to JP2000503482A priority patent/JP2001510916A/ja
Priority to BR9810768-2A priority patent/BR9810768A/pt
Publication of SE9702762L publication Critical patent/SE9702762L/sv
Publication of SE510295C2 publication Critical patent/SE510295C2/sv

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/30003—Arrangements for executing specific machine instructions
    • G06F9/3005—Arrangements for executing specific machine instructions to perform operations for flow control
    • G06F9/30058—Conditional branch instructions
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3802—Instruction prefetching
    • G06F9/3804—Instruction prefetching for branches, e.g. hedging, branch folding
    • G06F9/3806—Instruction prefetching for branches, e.g. hedging, branch folding using address prediction, e.g. return stack, branch history buffer
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3861—Recovery, e.g. branch miss-prediction, exception handling
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G—PHYSICS
    • G06—COMPUTING; CALCULATING OR COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F9/00—Arrangements for program control, e.g. control units
    • G06F9/06—Arrangements for program control, e.g. control units using stored programs, i.e. using an internal store of processing equipment to receive or retain programs
    • G06F9/30—Arrangements for executing machine instructions, e.g. instruction decode
    • G06F9/38—Concurrent instruction execution, e.g. pipeline or look ahead
    • G06F9/3885—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units
    • G06F9/3887—Concurrent instruction execution, e.g. pipeline or look ahead using a plurality of independent parallel functional units controlled by a single instruction for multiple data lanes [SIMD]

Landscapes

  • Engineering & Computer Science (AREA)
  • Software Systems (AREA)
  • Theoretical Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Advance Control (AREA)
SE9702762A 1997-07-21 1997-07-21 Metod vid processor för att hantera villkorade hoppinstruktioner samt processor anpassad att verka enligt den angivna metoden SE510295C2 (sv)

Priority Applications (8)

Application Number Priority Date Filing Date Title
SE9702762A SE510295C2 (sv) 1997-07-21 1997-07-21 Metod vid processor för att hantera villkorade hoppinstruktioner samt processor anpassad att verka enligt den angivna metoden
KR1020007000634A KR20010022065A (ko) 1997-07-21 1998-07-07 조건부 점프의 취급에 적용된 처리기 및 방법
AU83652/98A AU8365298A (en) 1997-07-21 1998-07-07 A method for handling conditional jump instructions in a data processor
CN98809339A CN1271434A (zh) 1997-07-21 1998-07-07 数据处理器中处理条件跳转指令的方法
PCT/SE1998/001334 WO1999004335A2 (en) 1997-07-21 1998-07-07 A method and a processor adapted for the handling of conditional jumps
EP98934048A EP0998701A2 (en) 1997-07-21 1998-07-07 A method for handling conditional jump instructions in a data processor
JP2000503482A JP2001510916A (ja) 1997-07-21 1998-07-07 データプロセッサにおける条件付きジャンプ命令の処理方法
BR9810768-2A BR9810768A (pt) 1997-07-21 1998-07-07 Processo de manuseio de instruções especìficas, e, processador

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
SE9702762A SE510295C2 (sv) 1997-07-21 1997-07-21 Metod vid processor för att hantera villkorade hoppinstruktioner samt processor anpassad att verka enligt den angivna metoden

Publications (3)

Publication Number Publication Date
SE9702762D0 true SE9702762D0 (sv) 1997-07-21
SE9702762L SE9702762L (sv) 1999-01-22
SE510295C2 SE510295C2 (sv) 1999-05-10

Family

ID=20407793

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9702762A SE510295C2 (sv) 1997-07-21 1997-07-21 Metod vid processor för att hantera villkorade hoppinstruktioner samt processor anpassad att verka enligt den angivna metoden

Country Status (8)

Country Link
EP (1) EP0998701A2 (sv)
JP (1) JP2001510916A (sv)
KR (1) KR20010022065A (sv)
CN (1) CN1271434A (sv)
AU (1) AU8365298A (sv)
BR (1) BR9810768A (sv)
SE (1) SE510295C2 (sv)
WO (1) WO1999004335A2 (sv)

Families Citing this family (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7281120B2 (en) * 2004-03-26 2007-10-09 International Business Machines Corporation Apparatus and method for decreasing the latency between an instruction cache and a pipeline processor
US9952869B2 (en) 2009-11-04 2018-04-24 Ceva D.S.P. Ltd. System and method for using a branch mis-prediction buffer
EP2367102B1 (en) 2010-02-11 2013-04-10 Nxp B.V. Computer processor and method with increased security properties

Family Cites Families (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US4755935A (en) * 1986-01-27 1988-07-05 Schlumberger Technology Corporation Prefetch memory system having next-instruction buffer which stores target tracks of jumps prior to CPU access of instruction
CA1285657C (en) * 1986-01-29 1991-07-02 Douglas W. Clark Apparatus and method for execution of branch instructions
GB8728493D0 (en) * 1987-12-05 1988-01-13 Int Computers Ltd Jump prediction
SE509499C2 (sv) * 1996-05-03 1999-02-01 Ericsson Telefon Ab L M Metod och anordning för hantering av villkorliga hopp vid instruktionsbehandling i en pipeline-arkitektur

Also Published As

Publication number Publication date
BR9810768A (pt) 2000-08-15
EP0998701A2 (en) 2000-05-10
KR20010022065A (ko) 2001-03-15
SE9702762L (sv) 1999-01-22
WO1999004335A3 (en) 1999-04-08
WO1999004335A2 (en) 1999-01-28
AU8365298A (en) 1999-02-10
JP2001510916A (ja) 2001-08-07
CN1271434A (zh) 2000-10-25
SE510295C2 (sv) 1999-05-10

Similar Documents

Publication Publication Date Title
SE9901096L (sv) Metod och apparat för undantagshantering
EP0911724A3 (en) Process and method for utilizing register file resources
DE69811832T2 (de) Verfahren zur Schätzung von Statistiken der Eigenschaften von durch eine Prozessorpipeline bearbeiteten Wechselwirkungen
KR860007589A (ko) 데이터 처리장치
TW364981B (en) Computer methods for writing a scalar value to a vector
JPS56123041A (en) Information processor
JPS6462764A (en) Vector computer
EP1840736B1 (en) Multi-processor system and program execution method in the system
SE9702762D0 (sv) Metod vid processor samt processor anpassad att verka enligt den angivna metoden
MY124779A (en) Data processing using a coprocessor
JPS6446134A (en) Data processor
SE9501015D0 (sv) Arrangement and method relating to handling of digital signals and a processing arrangement comprising such
KR100516214B1 (ko) 명령어 병렬처리를 위한 디지털 신호처리기 및 그처리방법
JPS5731049A (en) Information processing equipment
JPS647130A (en) Instruction prefetch method for memory system
JPS6450141A (en) Information processor
JPS638491B2 (sv)
JP2851192B2 (ja) 並列演算処理装置におけるキャリー付き加減算処理方式
JPS6450142A (en) Information processor
JP3705263B2 (ja) シーケンサ
SE8500156L (sv) Forfarande for behandling av maskinkodade instruktionsord och dataprocessor for utforande av forfarandet
JPS6069747A (ja) サブル−チン呼び出し方法
JPS5713563A (en) Data access system in auxiliary memory device
JPS57105041A (en) Program control system
JPS5668878A (en) Data processor

Legal Events

Date Code Title Description
NUG Patent has lapsed