SE9700215D0 - A method for producing a semiconductor layer of SiC of the 3C-polytype and a semiconductor device having an insulator between a carrier and the active semiconductor layer - Google Patents

A method for producing a semiconductor layer of SiC of the 3C-polytype and a semiconductor device having an insulator between a carrier and the active semiconductor layer

Info

Publication number
SE9700215D0
SE9700215D0 SE9700215A SE9700215A SE9700215D0 SE 9700215 D0 SE9700215 D0 SE 9700215D0 SE 9700215 A SE9700215 A SE 9700215A SE 9700215 A SE9700215 A SE 9700215A SE 9700215 D0 SE9700215 D0 SE 9700215D0
Authority
SE
Sweden
Prior art keywords
sic
semiconductor layer
layer
polytype
producing
Prior art date
Application number
SE9700215A
Other languages
English (en)
Other versions
SE9700215L (sv
Inventor
Christopher Harris
Original Assignee
Abb Research Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Abb Research Ltd filed Critical Abb Research Ltd
Priority to SE9700215A priority Critical patent/SE9700215L/sv
Publication of SE9700215D0 publication Critical patent/SE9700215D0/sv
Priority to US08/804,685 priority patent/US5798293A/en
Publication of SE9700215L publication Critical patent/SE9700215L/sv

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76256Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques using silicon etch back techniques, e.g. BESOI, ELTRAN
    • CCHEMISTRY; METALLURGY
    • C30CRYSTAL GROWTH
    • C30BSINGLE-CRYSTAL GROWTH; UNIDIRECTIONAL SOLIDIFICATION OF EUTECTIC MATERIAL OR UNIDIRECTIONAL DEMIXING OF EUTECTOID MATERIAL; REFINING BY ZONE-MELTING OF MATERIAL; PRODUCTION OF A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; SINGLE CRYSTALS OR HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; AFTER-TREATMENT OF SINGLE CRYSTALS OR A HOMOGENEOUS POLYCRYSTALLINE MATERIAL WITH DEFINED STRUCTURE; APPARATUS THEREFOR
    • C30B25/00Single-crystal growth by chemical reaction of reactive gases, e.g. chemical vapour-deposition growth
    • C30B25/02Epitaxial-layer growth
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02441Group 14 semiconducting materials
    • H01L21/02447Silicon carbide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
    • H01L21/02502Layer structure consisting of two layers
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8232Field-effect technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/24Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only semiconductor materials not provided for in groups H01L29/16, H01L29/18, H01L29/20, H01L29/22
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/02Semiconductor bodies ; Multistep manufacturing processes therefor
    • H01L29/12Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed
    • H01L29/16Semiconductor bodies ; Multistep manufacturing processes therefor characterised by the materials of which they are formed including, apart from doping materials or other impurities, only elements of Group IV of the Periodic Table
    • H01L29/1608Silicon carbide
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • YGENERAL TAGGING OF NEW TECHNOLOGICAL DEVELOPMENTS; GENERAL TAGGING OF CROSS-SECTIONAL TECHNOLOGIES SPANNING OVER SEVERAL SECTIONS OF THE IPC; TECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10TECHNICAL SUBJECTS COVERED BY FORMER USPC
    • Y10STECHNICAL SUBJECTS COVERED BY FORMER USPC CROSS-REFERENCE ART COLLECTIONS [XRACs] AND DIGESTS
    • Y10S438/00Semiconductor device manufacturing: process
    • Y10S438/931Silicon carbide semiconductor

Landscapes

  • Engineering & Computer Science (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Computer Hardware Design (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Chemical & Material Sciences (AREA)
  • Ceramic Engineering (AREA)
  • Chemical Kinetics & Catalysis (AREA)
  • General Chemical & Material Sciences (AREA)
  • Crystallography & Structural Chemistry (AREA)
  • Materials Engineering (AREA)
  • Metallurgy (AREA)
  • Organic Chemistry (AREA)
  • Recrystallisation Techniques (AREA)
  • Laminated Bodies (AREA)
SE9700215A 1997-01-27 1997-01-27 Förfarande för framställning av ett halvledarskikt av SiC av 3C-polytypen ovanpå ett halvledarsubstratskikt utnyttjas wafer-bindningstekniken SE9700215L (sv)

Priority Applications (2)

Application Number Priority Date Filing Date Title
SE9700215A SE9700215L (sv) 1997-01-27 1997-01-27 Förfarande för framställning av ett halvledarskikt av SiC av 3C-polytypen ovanpå ett halvledarsubstratskikt utnyttjas wafer-bindningstekniken
US08/804,685 US5798293A (en) 1997-01-27 1997-02-25 Method for producing a semiconductor layer of SiC of the 3C-polytype and a semiconductor device having an insulator between a carrier and the active semiconductor layer

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
SE9700215A SE9700215L (sv) 1997-01-27 1997-01-27 Förfarande för framställning av ett halvledarskikt av SiC av 3C-polytypen ovanpå ett halvledarsubstratskikt utnyttjas wafer-bindningstekniken
US08/804,685 US5798293A (en) 1997-01-27 1997-02-25 Method for producing a semiconductor layer of SiC of the 3C-polytype and a semiconductor device having an insulator between a carrier and the active semiconductor layer

Publications (2)

Publication Number Publication Date
SE9700215D0 true SE9700215D0 (sv) 1997-01-27
SE9700215L SE9700215L (sv) 1998-02-18

Family

ID=26662853

Family Applications (1)

Application Number Title Priority Date Filing Date
SE9700215A SE9700215L (sv) 1997-01-27 1997-01-27 Förfarande för framställning av ett halvledarskikt av SiC av 3C-polytypen ovanpå ett halvledarsubstratskikt utnyttjas wafer-bindningstekniken

Country Status (2)

Country Link
US (1) US5798293A (sv)
SE (1) SE9700215L (sv)

Families Citing this family (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO1999009598A1 (de) * 1997-08-20 1999-02-25 Siemens Aktiengesellschaft Halbleiterstruktur mit einem alpha-siliziumcarbidbereich sowie verwendung dieser halbleiterstruktur
US6482725B1 (en) * 1999-08-18 2002-11-19 Advanced Micro Devices, Inc. Gate formation method for reduced poly-depletion and boron penetration
US6903373B1 (en) 1999-11-23 2005-06-07 Agere Systems Inc. SiC MOSFET for use as a power switch and a method of manufacturing the same
US6303508B1 (en) 1999-12-16 2001-10-16 Philips Electronics North America Corporation Superior silicon carbide integrated circuits and method of fabricating
US6699770B2 (en) * 2001-03-01 2004-03-02 John Tarje Torvik Method of making a hybride substrate having a thin silicon carbide membrane layer
US6566158B2 (en) 2001-08-17 2003-05-20 Rosemount Aerospace Inc. Method of preparing a semiconductor using ion implantation in a SiC layer
FR2836159B1 (fr) * 2002-02-15 2004-05-07 Centre Nat Rech Scient Procede de formation de couche de carbure de silicium ou de nitrure d'element iii sur un substrat adapte
US6982440B2 (en) * 2002-02-19 2006-01-03 Powersicel, Inc. Silicon carbide semiconductor devices with a regrown contact layer
GB2483702A (en) * 2010-09-17 2012-03-21 Ge Aviat Systems Ltd Method for the manufacture of a Silicon Carbide, Silicon Oxide interface having reduced interfacial carbon gettering

Family Cites Families (7)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH067594B2 (ja) * 1987-11-20 1994-01-26 富士通株式会社 半導体基板の製造方法
EP0536790B1 (en) * 1991-10-11 2004-03-03 Canon Kabushiki Kaisha Method for producing semiconductor articles
DE4234508C2 (de) * 1992-10-13 1994-12-22 Cs Halbleiter Solartech Verfahren zur Herstellung eines Wafers mit einer monokristallinen Siliciumcarbidschicht
US5455202A (en) * 1993-01-19 1995-10-03 Hughes Aircraft Company Method of making a microelectric device using an alternate substrate
US5349207A (en) * 1993-02-22 1994-09-20 Texas Instruments Incorporated Silicon carbide wafer bonded to a silicon wafer
SE9501312D0 (sv) * 1995-04-10 1995-04-10 Abb Research Ltd Method for procucing a semiconductor device
SE9601175D0 (sv) * 1996-03-27 1996-03-27 Abb Research Ltd A method for producing a semiconductor device by the use of an implanting step and a device produced thereby

Also Published As

Publication number Publication date
SE9700215L (sv) 1998-02-18
US5798293A (en) 1998-08-25

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