WO2003036699A3 - Lateral semiconductor-on-insulator structure and corresponding manufacturing methods - Google Patents

Lateral semiconductor-on-insulator structure and corresponding manufacturing methods Download PDF

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Publication number
WO2003036699A3
WO2003036699A3 PCT/GB2002/004738 GB0204738W WO03036699A3 WO 2003036699 A3 WO2003036699 A3 WO 2003036699A3 GB 0204738 W GB0204738 W GB 0204738W WO 03036699 A3 WO03036699 A3 WO 03036699A3
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WO
WIPO (PCT)
Prior art keywords
bandgap semiconductor
manufacturing methods
insulator structure
corresponding manufacturing
lateral semiconductor
Prior art date
Application number
PCT/GB2002/004738
Other languages
French (fr)
Other versions
WO2003036699A2 (en
Inventor
Florin Udrea
Original Assignee
Cambridge Semiconductor Ltd
Florin Udrea
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Cambridge Semiconductor Ltd, Florin Udrea filed Critical Cambridge Semiconductor Ltd
Priority to AU2002337297A priority Critical patent/AU2002337297A1/en
Publication of WO2003036699A2 publication Critical patent/WO2003036699A2/en
Publication of WO2003036699A3 publication Critical patent/WO2003036699A3/en

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    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L29/00Semiconductor devices specially adapted for rectifying, amplifying, oscillating or switching and having potential barriers; Capacitors or resistors having potential barriers, e.g. a PN-junction depletion layer or carrier concentration layer; Details of semiconductor bodies or of electrodes thereof ; Multistep manufacturing processes therefor
    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/76Unipolar devices, e.g. field effect transistors
    • H01L29/772Field effect transistors
    • H01L29/78Field effect transistors with field effect produced by an insulated gate
    • H01L29/7801DMOS transistors, i.e. MISFETs with a channel accommodating body or base region adjoining a drain drift region
    • H01L29/7816Lateral DMOS transistors, i.e. LDMOS transistors
    • H01L29/7824Lateral DMOS transistors, i.e. LDMOS transistors with a substrate comprising an insulating layer, e.g. SOI-LDMOS transistors
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/0405Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising semiconducting carbon, e.g. diamond, diamond-like carbon
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/762Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • HELECTRICITY
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    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/84Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being other than a semiconductor body, e.g. being an insulating body
    • HELECTRICITY
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    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers
    • H01L27/12Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body
    • H01L27/1203Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having potential barriers; including integrated passive circuit elements having potential barriers the substrate being other than a semiconductor body, e.g. an insulating body the substrate comprising an insulating body on a semiconductor body, e.g. SOI
    • HELECTRICITY
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/66007Multistep manufacturing processes
    • H01L29/66075Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials
    • H01L29/66227Multistep manufacturing processes of devices having semiconductor bodies comprising group 14 or group 13/15 materials the devices being controllable only by the electric current supplied or the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched, e.g. three-terminal devices
    • H01L29/66234Bipolar junction transistors [BJT]
    • H01L29/66325Bipolar junction transistors [BJT] controlled by field-effect, e.g. insulated gate bipolar transistors [IGBT]
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    • H01L29/66Types of semiconductor device ; Multistep manufacturing processes therefor
    • H01L29/68Types of semiconductor device ; Multistep manufacturing processes therefor controllable by only the electric current supplied, or only the electric potential applied, to an electrode which does not carry the current to be rectified, amplified or switched
    • H01L29/70Bipolar devices
    • H01L29/72Transistor-type devices, i.e. able to continuously respond to applied control signals
    • H01L29/739Transistor-type devices, i.e. able to continuously respond to applied control signals controlled by field-effect, e.g. bipolar static induction transistors [BSIT]
    • H01L29/7393Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET
    • H01L29/7394Insulated gate bipolar mode transistors, i.e. IGBT; IGT; COMFET on an insulating layer or substrate, e.g. thin film device or device isolated from the bulk substrate
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    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
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    • H01L21/02376Carbon, e.g. diamond-like carbon
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    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02367Substrates
    • H01L21/0237Materials
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    • H01L21/02381Silicon, silicon germanium, germanium
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    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02439Materials
    • H01L21/02441Group 14 semiconducting materials
    • H01L21/02447Silicon carbide
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    • H01L21/02365Forming inorganic semiconducting materials on a substrate
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    • H01L21/02104Forming layers
    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02436Intermediate layers between substrates and deposited layers
    • H01L21/02494Structure
    • H01L21/02496Layer structure
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    • H01L21/02365Forming inorganic semiconducting materials on a substrate
    • H01L21/02518Deposited layers
    • H01L21/02521Materials
    • H01L21/02524Group 14 semiconducting materials
    • H01L21/02532Silicon, silicon germanium, germanium
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    • H01L21/02546Arsenides

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  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Manufacturing & Machinery (AREA)
  • Ceramic Engineering (AREA)
  • Thin Film Transistor (AREA)
  • Recrystallisation Techniques (AREA)

Abstract

A semiconductor structure (10) has a low bandgap semiconductor layer (11), a buried insulator layer (12) below the low bandgap semiconductor layer (11), and a wide bandgap semiconductor substrate (13). The low bandgap semiconductor layer (11) may be for example silicon, SiGe, GaAs or a heterojunction. The wide bandgap semiconductor layer (13) may be for example silicon carbide or diamond. A semiconductor device may be made by bonding a wide bandgap semiconductor wafer (13) via an insulator layer (12) to a low bandgap semiconductor wafer (11) and subsequently forming a semiconductor device in the low bandgap semiconductor wafer (11).
PCT/GB2002/004738 2001-10-23 2002-10-21 Lateral semiconductor-on-insulator structure and corresponding manufacturing methods WO2003036699A2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
AU2002337297A AU2002337297A1 (en) 2001-10-23 2002-10-21 Lateral semiconductor-on-insulator structure and corresponding manufacturing methods

Applications Claiming Priority (2)

Application Number Priority Date Filing Date Title
US33050601P 2001-10-23 2001-10-23
US60/330,506 2001-10-23

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Publication Number Publication Date
WO2003036699A2 WO2003036699A2 (en) 2003-05-01
WO2003036699A3 true WO2003036699A3 (en) 2003-09-25

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WO (1) WO2003036699A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9035354B2 (en) 2004-02-05 2015-05-19 Cree, Inc. Heterojunction transistors having barrier layer bandgaps greater than channel layer bandgaps and related methods

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* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US7033912B2 (en) * 2004-01-22 2006-04-25 Cree, Inc. Silicon carbide on diamond substrates and related devices and methods
US7594075B2 (en) * 2004-10-20 2009-09-22 Seagate Technology Llc Metadata for a grid based data storage system
US7560322B2 (en) 2004-10-27 2009-07-14 Northrop Grumman Systems Corporation Method of making a semiconductor structure for high power semiconductor devices
JP5017926B2 (en) 2005-09-28 2012-09-05 株式会社デンソー Semiconductor device and manufacturing method thereof
US20130154049A1 (en) * 2011-06-22 2013-06-20 George IMTHURN Integrated Circuits on Ceramic Wafers Using Layer Transfer Technology
US10290702B2 (en) 2012-07-31 2019-05-14 Silanna Asia Pte Ltd Power device on bulk substrate
US9412881B2 (en) 2012-07-31 2016-08-09 Silanna Asia Pte Ltd Power device integration on a common substrate
EP2880688B1 (en) * 2012-07-31 2020-07-15 Silanna Asia Pte Ltd. Power device integration on a common substrate
CN104425257A (en) * 2013-08-30 2015-03-18 无锡华润上华半导体有限公司 Insulated gate bipolar transistor and manufacturing method thereof
US9923059B1 (en) 2017-02-20 2018-03-20 Silanna Asia Pte Ltd Connection arrangements for integrated lateral diffusion field effect transistors
US10083897B2 (en) 2017-02-20 2018-09-25 Silanna Asia Pte Ltd Connection arrangements for integrated lateral diffusion field effect transistors having a backside contact
FR3079662B1 (en) * 2018-03-30 2020-02-28 Soitec SUBSTRATE FOR RADIO FREQUENCY APPLICATIONS AND MANUFACTURING METHOD THEREOF

Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1114497A (en) * 1965-06-28 1968-05-22 Dow Corning Improvements in or relating to semiconductor devices
US5441911A (en) * 1993-02-22 1995-08-15 Texas Instruments Incorporated Silicon carbide wafer bonded to a silicon wafer
EP0905767A1 (en) * 1997-09-26 1999-03-31 Shin-Etsu Handotai Company Limited Method of fabricating an SOI wafer and SOI wafer fabricated thereby
US6127243A (en) * 1998-03-12 2000-10-03 Siemens Aktiengesellschaft Method for bonding two wafers
EP1081748A2 (en) * 1999-08-30 2001-03-07 Lucent Technologies Inc. Etch stops and alignment marks for bonded wafers
US20010016399A1 (en) * 1999-02-22 2001-08-23 Harris Corporation Method for forming a bonded substrate containing a planar intrinsic gettering zone and substrate formed by said method

Patent Citations (6)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
GB1114497A (en) * 1965-06-28 1968-05-22 Dow Corning Improvements in or relating to semiconductor devices
US5441911A (en) * 1993-02-22 1995-08-15 Texas Instruments Incorporated Silicon carbide wafer bonded to a silicon wafer
EP0905767A1 (en) * 1997-09-26 1999-03-31 Shin-Etsu Handotai Company Limited Method of fabricating an SOI wafer and SOI wafer fabricated thereby
US6127243A (en) * 1998-03-12 2000-10-03 Siemens Aktiengesellschaft Method for bonding two wafers
US20010016399A1 (en) * 1999-02-22 2001-08-23 Harris Corporation Method for forming a bonded substrate containing a planar intrinsic gettering zone and substrate formed by said method
EP1081748A2 (en) * 1999-08-30 2001-03-07 Lucent Technologies Inc. Etch stops and alignment marks for bonded wafers

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
US9035354B2 (en) 2004-02-05 2015-05-19 Cree, Inc. Heterojunction transistors having barrier layer bandgaps greater than channel layer bandgaps and related methods

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WO2003036699A2 (en) 2003-05-01

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